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ATmega64A Datasheet(PDF) 88 Page - ATMEL Corporation |
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ATmega64A Datasheet(HTML) 88 Page - ATMEL Corporation |
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88 / 392 page  88 8160C–AVR–07/09 ATmega64A •WR – Port G, Bit 0 WR is the external data memory write control strobe. Table 13-22 and Table 13-23 relates the alternate functions of Port G to the overriding signals shown in Figure 13-5 on page 73. 13.4 Register Description 13.4.1 PORTA – Port A Data Register Table 13-22. Overriding Signals for Alternate Functions in PG4:PG1 Signal Name PG4/TOSC1 PG3/TOSC2 PG2/ALE PG1/RD PUOE AS0 AS0 SRE SRE PUOV 0 0 0 0 DDOE AS0 AS0 SRE SRE DDOV 0 0 1 1 PVOE 0 0 SRE SRE PVOV 0 0 ALE RD DIEOE AS0 AS0 0 0 DIEOV 0 0 0 0 DI – – – – AIO T/C0 OSC INPUT T/C0 OSC OUTPUT – – Table 13-23. Overriding Signals for Alternate Functions in PG0 Signal Name PG0/WR PUOE SRE PUOV 0 DDOE SRE DDOV 1 PVOE SRE PVOV WR DIEOE 0 DIEOV 0 DI – AIO – Bit 7 65 43 21 0 0x1B (0x3B) PORTA7 PORTA6 PORTA5 PORTA4 PORTA3 PORTA2 PORTA1 PORTA0 PORTA Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value 0 0 0 0 0 0 0 0 |
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