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ATmega64A Datasheet(PDF) 89 Page - ATMEL Corporation |
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ATmega64A Datasheet(HTML) 89 Page - ATMEL Corporation |
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89 / 392 page ![]() 89 8160C–AVR–07/09 ATmega64A 13.4.2 DDRA – Port A Data Direction Register 13.4.3 PINA – Port A Input Pins Address 13.4.4 PORTB – Port B Data Register 13.4.5 DDRB – Port B Data Direction Register 13.4.6 PINB – Port B Input Pins Address 13.4.7 PORTC – Port C Data Register 13.4.8 DDRC – Port C Data Direction Register 13.4.9 PINC – Port C Input Pins Address In ATmega103 compatibility mode, DDRC and PINC Registers are initialized to being Push-pull Zero Output. The port pins assumes their Initial Value, even if the clock is not running. Note that Bit 7 65 43 21 0 0x1A (0x3A) DDA7 DDA6 DDA5 DDA4 DDA3 DDA2 DDA1 DDA0 DDRA Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value 0 0 0 0 0 0 0 0 Bit 7 65 43 21 0 0x19 (0x39) PINA7 PINA6 PINA5 PINA4 PINA3 PINA2 PINA1 PINA0 PINA Read/Write RR RRR RR R Initial Value N/A N/A N/A N/A N/A N/A N/A N/A Bit 765 43 21 0 0x18 (0x38) PORTB7 PORTB6 PORTB5 PORTB4 PORTB3 PORTB2 PORTB1 PORTB0 PORTB Read/Write R/WR/W R/WR/W R/WR/W R/WR/W Initial Value 0 0 0 0 0 0 0 0 Bit 765 43 21 0 0x17 (0x37) DDB7 DDB6 DDB5 DDB4 DDB3 DDB2 DDB1 DDB0 DDRB Read/Write R/WR/W R/WR/W R/WR/W R/WR/W Initial Value 0 0 0 0 0 0 0 0 Bit 7 65 43 21 0 0x16 (0x36) PINB7 PINB6 PINB5 PINB4 PINB3 PINB2 PINB1 PINB0 PINB Read/Write RR RRR RR R Initial Value N/A N/A N/A N/A N/A N/A N/A N/A Bit 7 65 43 21 0 0x15 (0x35) PORTC7 PORTC6 PORTC5 PORTC4 PORTC3 PORTC2 PORTC1 PORTC0 PORTC Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value 0 0 0 0 0 0 0 0 Bit 765 43 21 0 0x14 (0x34) DDC7 DDC6 DDC5 DDC4 DDC3 DDC2 DDC1 DDC0 DDRC Read/Write R/WR/W R/WR/W R/WR/W R/WR/W Initial Value 0 0 0 0 0 0 0 0 Bit 7 65 43 21 0 0x13 (0x33) PINC7 PINC6 PINC5 PINC4 PINC3 PINC2 PINC1 PINC0 PINC Read/Write RRR RR RR R Initial Value N/A N/A N/A N/A N/A N/A N/A N/A |
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