| Electronic Components Datasheet Search |
|
ATmega64A Datasheet(PDF) 5 Page - ATMEL Corporation |
|
|
|||||||||||||||||||||||||||||
ATmega64A Datasheet(HTML) 5 Page - ATMEL Corporation |
|
5 / 392 page ![]() 5 8160C–AVR–07/09 ATmega64A 2.2.1 ATmega103 Compatibility Mode By programming the M103C Fuse, the ATmega64A will be compatible with the ATmega103 regards to RAM, I/O pins and Interrupt Vectors as described above. However, some new fea- tures in ATmega64A are not available in this compatibility mode, these features are listed below: • One USART instead of two, asynchronous mode only. Only the eight least significant bits of the Baud Rate Register is available. • One 16 bits Timer/Counter with two compare registers instead of two 16 bits Timer/Counters with three compare registers. • Two-wire serial interface is not supported. • Port G serves alternate functions only (not a general I/O port). • Port F serves as digital input only in addition to analog input to the ADC. • Boot Loader capabilities is not supported. • It is not possible to adjust the frequency of the internal calibrated RC Oscillator. • The External Memory Interface can not release any Address pins for general I/O, neither configure different wait states to different External Memory Address sections. • Only EXTRF and PORF exist in the MCUCSR Register. • No timed sequence is required for Watchdog Timeout change. • Only low-level external interrupts can be used on four of the eight External Interrupt sources. • Port C is output only. • USART has no FIFO buffer, so Data OverRun comes earlier. • The user must have set unused I/O bits to 0 in ATmega103 programs. 2.3 Pin Descriptions 2.3.1 VCC Digital supply voltage. 2.3.2 GND Ground. 2.3.3 Port A (PA7:PA0) Port A is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port A output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port A pins that are externally pulled low will source current if the pull-up resistors are activated. The Port A pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port A also serves the functions of various special features of the ATmega64A as listed on page 75. 2.3.4 Port B (PB7:PB0) Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up resistors are activated. The Port B pins are tri-stated when a reset condition becomes active, even if the clock is not running. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |