ATmega64A datasheet(18/392 Pages) ATMEL

18 / 392 page

8160C–AVR–07/09

ATmega64A

Figure 7-1.

Program Memory Map

7.2

SRAM Data Memory

The ATmega64A supports two different configurations for the SRAM data memory as listed in

Table 7-1.

Figure 7-2 on page 20 shows how the ATmega64A SRAM Memory is organized.

The ATmega64A is a complex microcontroller with more peripheral units than can be supported

within the 64 locations reserved in the Opcode for the IN and OUT instructions. For the

Extended I/O space from 0x60 - 0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD instruc-

tions can be used. The Extended I/O space does not exist when the ATmega64A is in the

ATmega103 compatibility mode.

The first 4,352 data memory locations address both the Register File, the I/O memory, Extended

I/O memory, and the internal data SRAM. The first 32 locations address the Register File, the

next 64 location the standard I/O memory, then 160 locations of Extended I/O memory, and the

next 4,096 locations address the internal data SRAM.

$0000

$7FFF

Application Flash Section

Boot Flash Section

Table 7-1.

Memory Configurations

Configuration

Internal SRAM

Data Memory

External SRAM

Data Memory

Normal mode

4096

up to 64K

ATmega103 compatibility mode

4000

up to 64K

ATmega64A Datasheet(PDF) 18 Page - ATMEL Corporation