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R5F562TADDFM Datasheet(PDF) 52 Page - Renesas Technology Corp

Part # R5F562TADDFM
Description  100-MHz 32-bit RX MCUs, FPU, 165 DMIPS, 12-bit ADC
PDF  94 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F562TADDFM Datasheet(HTML) 52 Page - Renesas Technology Corp

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R01DS0096EJ0100 Rev.1.00
Page 52 of 92
Apr 20, 2011
RX62T Group
4. I/O Registers
000C 1C96h
MTU5
Timer I/O control register V
TIORV
8
8
5ICLK
000C 1CA0h
MTU5
Timer counter W
TCNTW
16
16, 32
5ICLK
000C 1CA2h
MTU5
Timer general register W
TGRW
16
16
5ICLK
000C 1CA4h
MTU5
Timer control register W
TCRW
8
8
5ICLK
000C 1CA6h
MTU5
Timer I/O control register W
TIORW
8
8
5ICLK
000C 1CB0h
MTU5
Timer status register
TSR
8
8
5ICLK
000C 1CB2h
MTU5
Timer interrupt enable register
TIER
8
8
5ICLK
000C 1CB4h
MTU5
Timer start register
TSTR
8
8
5ICLK
000C 1CB6h
MTU5
Timer compare match clear register
TCNTCMPC
LR
8
8
5ICLK
000C 2000h
GPT
General PWM timer software start register
GTSTR
16
8, 16, 32
3 to 5ICLK*6
000C 2004h
GPT
General PWM timer hardware source start
control register
GTHSCR
16
8, 16, 32
3 to 5ICLK*6
000C 2006h
GPT
General PWM timer hardware source clear
control register
GTHCCR
16
8, 16, 32
3 to 5ICLK*6
000C 2008h
GPT
General PWM timer hardware start source
select register
GTHSSR
16
8, 16, 32
3 to 5ICLK*6
000C 200Ah
GPT
General PWM timer hardware stop/clear source
select register
GTHPSR
16
8, 16, 32
3 to 5ICLK*6
000C 200Ch
GPT
General PWM timer write-protection register
GTWP
16
8, 16, 32
3 to 5ICLK*6
000C 200Eh
GPT
General PWM timer sync register
GTSYNC
16
8, 16, 32
3 to 5ICLK*6
000C 2010h
GPT
General PWM timer external trigger input
interrupt register
GTETINT
16
8, 16, 32
3 to 5ICLK*6
000C 2014h
GPT
General PWM timer buffer operation disable
register
GTBDR
16
8, 16, 32
3 to 5ICLK*6
000C 2080h
GPT
LOCO count control register
LCCR
16
8, 16, 32
3 to 5ICLK*6
000C 2082h
GPT
LOCO count status register
LCST
16
8, 16, 32
3 to 5ICLK*6
000C 2084h
GPT
LOCO count value register
LCNT
16
8, 16, 32
3 to 5ICLK*6
000C 2086h
GPT
LOCO count result average register
LCNTA
16
8, 16, 32
3 to 5ICLK*6
000C 2088h
GPT
LOCO count result register 0
LCNT00
16
8, 16, 32
3 to 5ICLK*6
000C 208Ah
GPT
LOCO count result register 1
LCNT01
16
8, 16, 32
3 to 5ICLK*6
000C 208Ch
GPT
LOCO count result register 2
LCNT02
16
8, 16, 32
3 to 5ICLK*6
000C 208Eh
GPT
LOCO count result register 3
LCNT03
16
8, 16, 32
3 to 5ICLK*6
000C 2090h
GPT
LOCO count result register 4
LCNT04
16
8, 16, 32
3 to 5ICLK*6
000C 2092h
GPT
LOCO count result register 5
LCNT05
16
8, 16, 32
3 to 5ICLK*6
000C 2094h
GPT
LOCO count result register 6
LCNT06
16
8, 16, 32
3 to 5ICLK*6
000C 2096h
GPT
LOCO count result register 7
LCNT07
16
8, 16, 32
3 to 5ICLK*6
'000C 2098h
GPT
LOCO count result register 8
LCNT08
16
8, 16, 32
3 to 5ICLK*6
000C 209Ah
GPT
LOCO count result register 9
LCNT09
16
8, 16, 32
3 to 5ICLK*6
000C 209Ch
GPT
LOCO count result register 10
LCNT10
16
8, 16, 32
3 to 5ICLK*6
000C 209Eh
GPT
LOCO count result register 11
LCNT11
16
8, 16, 32
3 to 5ICLK*6
000C 20A0h
GPT
LOCO count result register 12
LCNT12
16
8, 16, 32
3 to 5ICLK*6
000C 20A2h
GPT
LOCO count result register 13
LCNT13
16
8, 16, 32
3 to 5ICLK*6
000C 20A4h
GPT
LOCO count result register 14
LCNT14
16
8, 16, 32
3 to 5ICLK*6
000C 20A6h
GPT
LOCO count result register 15
LCNT15
16
8, 16, 32
3 to 5ICLK*6
000C 20A8h
GPT
LOCO count upper permissible deviation
register
LCNTDU
16
8, 16, 32
3 to 5ICLK*6
Table 4.1
List of I/O Registers (Address Order) (19 / 23)
Address
Module
Abbreviation
Register Name
Register
Abbreviation
Number
of Bits
Access
Size
Number of
Access
Cycles



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