WM8946ECSSLASHR datasheet(114/175 Pages) WOLFSON

114 / 175 page

WM8946

Production Data

PD, July 2012, Rev 4.3

114

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

1:0

VMID_SEL[1:0]

VMID Divider Enable and Select

00 = VMID disabled (for OFF mode)

01 = 2 x 50k divider (for normal operation)

10 = 2 x 250k divider (for low power standby)

11 = 2 x 5k divider (for fast start-up)

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R3 (03h)

Power

management

OUTR_ENA

LINEOUTR enable

0 = Disabled

1 = Enabled

OUTL_ENA

LINEOUTL enable

0 = Disabled

1 = Enabled

SPKR_PGA_E

Speaker Right PGA enable

0 = Disabled

1 = Enabled

SPKL_PGA_E

Speaker Left PGA enable

0 = Disabled

1 = Enabled

SPKR_SPKVD

D_ENA

SPKOUTR enable

0 = Disabled

1 = Enabled

Note that SPKOUTR is also controlled by

SPKR_OP_ENA. When powering down SPKOUTR, the

SPKR_SPKVDD_ENA bit should be reset first.

SPKL_SPKVD

D_ENA

SPKOUTL enable

0 = Disabled

1 = Enabled

Note that SPKOUTL is also controlled by

SPKL_OP_ENA. When powering down SPKOUTL, the

SPKL_SPKVDD_ENA bit should be reset first

SPKR_OP_MU

SPKOUTR Output Mute

0 = Disable Mute

1 = Enable Mute

SPKL_OP_MU

SPKOUTL Output Mute

0 = Disable Mute

1 = Enable Mute

SPKR_OP_EN

SPKOUTR enable

0 = Disabled

1 = Enabled

Note that SPKOUTR is also controlled by

SPKR_SPKVDD_ENA. When powering up SPKOUTR,

the SPKR_OP_ENA bit should be enabled first.

SPKL_OP_EN

SPKOUTL enable

0 = Disabled

1 = Enabled

Note that SPKOUTL is also controlled by

SPKL_SPKVDD_ENA. When powering up SPKOUTL,

the SPKL_OP_ENA bit should be enabled first

SPKR_MIX_M

UTE

Right Speaker PGA Mixer Mute

0 = Disable Mute

WM8946ECS/R Datasheet(PDF) 114 Page - Wolfson Microelectronics plc

WM8946ECS/R Datasheet(HTML) 114 Page - Wolfson Microelectronics plc

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