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UPSD3312D Datasheet(PDF) 211 Page - STMicroelectronics

Part # UPSD3312D
Description  fast 8032 MCU with programmable logic
PDF  272 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

UPSD3312D Datasheet(HTML) 211 Page - STMicroelectronics

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UPSD33xx
PSD module
Doc ID 9685 Rev 7
211/272
Table 138.
MCU I/O Mode Port C Data Out register (address = csiop + offset 12h)(1)(2)
1.
For each bit, 1 = drive port pin to logic '1,' 0 = drive port pin to logic ’0’
2.
Default state of register is 00h after reset or power-up
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PC7
N/A
N/A
PC4
PC3
PC2
N/A
N/A
Table 139.
MCU I/O Mode Port D Data Out register (address = csiop + offset 13h)(1)(2)
1.
For each bit, 1 = drive port pin to logic '1,' 0 = drive port pin to logic ’0’
2.
Default state for register is 00h after reset or power-up
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
N/A
N/A
N/A
N/A
N/A
PD2(3)
3.
Not available on 52-pin UPSD33xx devices
PD1
N/A
Table 140.
MCU I/O Mode Port A Direction register (address=csiop+offset 06h)(1)(2)(3)
1.
Port A not available on 52-pin UPSD33xx devices
2.
For each bit, 1 = out from UPSD33xx port pin1, 0 = in to PSD33xx port pin
3.
Default state for register is 00h after reset or power-up
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
Table 141.
MCU I/O Mode Port B Direction Inregister (address=csiop+offset 07h)(1)(2)
1.
For each bit, 1 = out from UPSD33xx port pin1, 0 = in to PSD33xx port pin
2.
Default state for register is 00h after reset or power-up
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
Table 142.
MCU I/O Mode Port C Direction register (address = csiop + offset 14h)(1)(2)
1.
For each bit, 1 = out from UPSD33xx port pin1, 0 = in to PSD33xx port pin
2.
Default state for register is 00h after reset or power-up
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PC7
N/A
N/A
PC4
PC3
PC2
N/A
N/A
Table 143.
MCU I/O Mode Port DDirection register (address = csiop + offset 15h)(1)(2)
1.
For each bit, 1 = out from UPSD33xx port pin1, 0 = in to PSD33xx port pin
2.
Default state for register is 00h after reset or power-up
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
N/A
N/A
N/A
N/A
N/A
PD2(3)
3.
Not available on 52-pin UPSD33xx devices
PD1
N/A



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