WM9714CLGEFLSLASHV datasheet(73/120 Pages) CIRRUS

73 / 120 page

WM9714L

Rev 4.0

8 circuits like this (one for each GPIO pin)

XNOR

WRITE '0'

TO 54h.n

STATUS

(SLOT12.n)

GPIO

POLARITY

(4Eh.n)

AND

CONFIGURATION (4Ch.n)

STICKY (50h.n)

WAKE-UP (52h.n)

RSFF

MUX

STATUS READBACK

54h.n / SLOT12.n

STICKY

(50h.n)

CONFIGURATION

(4Ch.n)

IRQ

PIN 45

XOR

GE2=0: CLOSED

GE2=1: OPEN

AND

WAKEEN

5Ah, bit 1

IRQINV

5Ah, bit 0

IF WM9714L SLEEPING:

WAKE UP AC-LINK

IF WM9714L AWAKE:

SET GPIO_INT

(SLOT12, BIT0)

OTHER

FUNCTION

56h.n

OTHER

GPIOs

STATUS

54h.n / SLOT12.n

XNOR

WRITE '0'

TO 54h.n

WM9714L

internal signal

POLARITY

(4Eh.n)

STICKY (50h.n)

WAKE-UP (52h.n)

RSFF

MUX

STICKY

(50h.n)

AND

STATUS READBACK

54h.n / SLOT12.n

7 circuits like this (one for each virtual GPIO)

CLEAR STICKY

0=NOT STICKY

1=STICKY

0=O/P

1=I/P

58h.n

FUNCTION

SELECT

Figure 27 GPIO Logic

GPIO

BIT

SLOT

12 BIT

TYPE

PIN NO.

DESCRIPTION

GPIO Pin

GPIO1

GPIO Pin

GPIO2 / IRQ

enabled only when pin not used as IRQ

GPIO Pin

GPIO3

GPIO Pin

GPIO4 / ADA / MASK

enabled only when pin not used as ADA

GPIO Pin

GPIO5 / S/PDIF_OUT

enabled only when pin not used as S/PDIF_OUT

GPIO Pin

GPIO6 / ADA / MASK

Enabled only when pin not used as ADA

GPIO Pin

GPIO7

GPIO Pin

GPIO8 / S/PDIF_OUT

enabled only when pin not used as S/PDIF_OUT

Virtual GPIO

[MICDET]

Internal microphone bias current detect, generates an interrupt above

a threshold (see MICBIAS Current Detect)

Virtual GPIO

[MICSHT]

Internal shorted microphone detect, generates an interrupt above a

threshold (see MICBIAS Current Detect)

Virtual GPIO

[Thermal Cutout]

Internal thermal cutout signal, indicates when internal temperature

reaches approximately 150

C (see “Thermal Sensor”)

Virtual GPIO

[ADA]

Internal ADA (ADC Data Available) Signal

enabled only when AUXADC is active

Virtual GPIO

[COMP2]

Internal COMP2 output (Low Battery Alarm)

enabled only when COMP2 is on

Virtual GPIO

[COMP1]

Internal COMP1 output (Dead Battery Alarm)

enabled only when COMP1 is on

Table 56 GPIO Bits and Pins

Note: GPIO7 (Pin 11) has an independent RESETB function. This must be disabled using RSTDIS (Register 5Ah, bit 8) before

using Pin 11 as a GPIO.

WM9714CLGEFL/V Datasheet(PDF) 73 Page - Cirrus Logic

WM9714CLGEFL/V Datasheet(HTML) 73 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL