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WM9714CLGEFL/V Datasheet(PDF) 28 Page - Cirrus Logic |
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WM9714CLGEFL/V Datasheet(HTML) 28 Page - Cirrus Logic |
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28 / 120 page ![]() WM9714L 28 Rev 4.0 LEFT CHANNEL RIGHT CHANNEL PCMFS PCMCLK PCMADC/ PCMDAC n 3 2 1 n-2 n-1 LSB MSB n 3 2 1 n-2 n-1 1 BCLK / VXCLK Input Word Length (WL) 1/fs Figure 15 DSP Mode Audio Interface (mode B, FSP=1) In Left Justified mode, the MSB is available on the first rising edge of PCMCLK following a PCMFS transition. The other bits up to the LSB are then transmitted in order. Depending on word length, PCMCLK frequency and sample rate, there may be unused PCMCLK cycles before each PCMFS transition. LEFT CHANNEL RIGHT CHANNEL PCMFS PCMCLK PCMADC/ PCMDAC 1/fs n 3 2 1 n-2 n-1 LSB MSB n 3 2 1 n-2 n-1 LSB MSB Figure 16 Left Justified Audio Interface (assuming n-bit word length) In Right Justified mode, the LSB is available on the last rising edge of PCMCLK before a PCMFS transition. All other bits are transmitted before (MSB first). Depending on word length, PCMCLK frequency and sample rate, there may be unused PCMCLK cycles after each PCMFS transition. LEFT CHANNEL RIGHT CHANNEL PCMFS PCMCLK PCMADC / PCMDAC 1/fs n 3 2 1 n-2 n-1 LSB MSB n 3 2 1 n-2 n-1 LSB MSB Figure 17 Right Justified Audio Interface (assuming n-bit word length) |
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