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PDP83TG720SWCSTQ1 Datasheet(PDF) 52 Page - Texas Instruments |
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PDP83TG720SWCSTQ1 Datasheet(HTML) 52 Page - Texas Instruments |
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52 / 199 page ![]() 7.6.2 DP83TG720 Registers Table 7-22 lists the DP83TG720 registers. All register offset addresses not listed in Table 7-22 should be considered as reserved locations and the register contents should not be modified. Table 7-22. DP83TG720 Registers Address Acronym Register Name Section 0x0 BMCR Go 0x1 BMSR Go 0x2 PHYID1 Go 0x3 PHYID2 Go 0xF MII_REG_F Go 0x10 MII_REG_10 Go 0x11 MII_REG_11 Go 0x12 MII_REG_12 Go 0x13 MII_REG_13 Go 0x16 MII_REG_16 Go 0x18 MII_REG_18 Go 0x19 MII_REG_19 Go 0x1E MII_REG_1E Go 0x1F MII_REG_1F Go 0x180 C_AND_S_STATUS Go 0x181 PM_TOP_CFG Go 0x182 CLK_CTRL_CFG Go 0x183 LPS_CFG Go 0x18B LPS_CFG2 Go 0x18C LPS_CFG3 Go 0x18E LPS_STATUS Go 0x300 TDR_TX_CFG Go 0x301 TDR_PROCESS_CFG Go 0x302 TDR_CFG1 Go 0x303 TDR_CFG2 Go 0x304 TDR_CFG3 Go 0x305 TDR_CFG4 Go 0x309 TDR_STATUS0 Go 0x30A TDR_STATUS1 Go 0x30B TDR_STATUS2 Go 0x30C TDR_STATUS3 Go 0x30D TDR_STATUS4 Go 0x30E TDR_STATUS5 Go 0x30F TDR_TC12 Go 0x45D SOR_VECTOR_1 Go 0x45E SOR_VECTOR_2 Go 0x466 REV_ID Go 0x514 LPS_CONTROL_1 Go 0x515 LPS_CONTROL_2 Go 0x518 MAXWAIT_TIMER Go 0x519 PHY_CTRL_1G Go 0x531 TEST_MODE Go DP83TG720S-Q1 SNLS604 – SEPTEMBER 2020 www.ti.com 52 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated |
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