| Electronic Components Datasheet Search |
|
PDP83TG720SWCSTQ1 Datasheet(PDF) 78 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
PDP83TG720SWCSTQ1 Datasheet(HTML) 78 Page - Texas Instruments |
|
78 / 199 page ![]() 7.6.2.22 TDR_TX_CFG Register (Address = 0x300) [reset = 0x3E8] TDR_TX_CFG is shown in Table 7-45. Return to the Summary Table. Table 7-45. TDR_TX_CFG Register Field Descriptions Bit Field Type Reset Description 15-0 cfg_tdr_tx_duration R/W 16b0000001 111101000 TDR transmit duration in usec 16b0000000000000000 = allow tx_err assertion to PHY when tx_en set to zero 16b0000000000000001 = suppress tx_err in full duplex mode when tx_en set to zero DP83TG720S-Q1 SNLS604 – SEPTEMBER 2020 www.ti.com 78 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |