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PDP83TG720SWCSTQ1 Datasheet(PDF) 156 Page - Texas Instruments |
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PDP83TG720SWCSTQ1 Datasheet(HTML) 156 Page - Texas Instruments |
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156 / 199 page ![]() 7.6.2.98 DSP_DEBUG2_REG_86 Register (Address = 0xA86) [reset = 0x0] DSP_DEBUG2_REG_86 is shown in Table 7-121. Return to the Summary Table. Table 7-121. DSP_DEBUG2_REG_86 Register Field Descriptions Bit Field Type Reset Description 15-0 MSE R 16b0000000 000000000 Debug read access for the MSE which is an indicator of signal quality. Will increase with increase in cable length. Used for cable Emulation. See https://confluence.itg.ti.com/display/ DP83720/9.10+Cable+Length+Emulator and document attached to this page. DP83TG720S-Q1 SNLS604 – SEPTEMBER 2020 www.ti.com 156 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated |
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