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LSM6DSV320X Datasheet(PDF) 30 Page - STMicroelectronics |
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LSM6DSV320X Datasheet(HTML) 30 Page - STMicroelectronics |
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30 / 212 page  5.3 Auxiliary MIPI I3C® target interface The LSM6DSV320X interface includes an auxiliary MIPI I3C® SDR-only target interface (compliant with release 1.1 of the specification) with MIPI I3C® SDR embedded features: • CCC command • Direct CCC communication (SET and GET) • Broadcast CCC communication • Private communications • Private read and write for single byte • Multiple read and write • In-band interrupt request • Target reset pattern (peripheral reset only) • Group address • Full range VDDIO support • Error detection and recovery methods (S0-S6) In order to disable the MIPI I3C® auxiliary block, IF2_SPI_READ_EN = 1 must be written in IF2_CTRL1_OIS (70h). Table 18. MIPI I3C® CCC commands Command Command code Default Description ENTDAA 0x07 DAA procedure SETDASA 0x87 Assign dynamic address using static address 0x6C/0x6D depending on the IF2_TA0_PID(TA0_aux) bit in CTRL5 (14h) ENEC 0x80/0x00 Target activity control (direct and broadcast) DISEC 0x81/0x01 Target activity control (direct and broadcast) ENTAS0 0x82/0x02 Enter activity state (direct and broadcast) RSTDAA 0x06 Reset the assigned dynamic address (broadcast only) SETMWL 0x89/0x08 Define maximum write length during private write (direct and broadcast) SETMRL 0x8A/0x09 Define maximum read length during private read (direct and broadcast) SETNEWDA 0x88 Change dynamic address GETMWL 0x8B 0x00 0x08 (2 byte) Get maximum write length during private write GETMRL 0x8C 0x00 0x10 0x0D (3 byte) Get maximum read length during private read GETPID 0x8D 0x02 0x08 0x00 0x73 0xB2 0x0B AUX_PID = 1 in CTRL5 (14h) LSM6DSV320X Digital interfaces DS14623 - Rev 1 page 30/212 |
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