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AS4SD4M16DG-10/IT Datasheet(PDF) 47 Page - Austin Semiconductor |
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AS4SD4M16DG-10/IT Datasheet(HTML) 47 Page - Austin Semiconductor |
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47 / 50 page  SDRAM SDRAM SDRAM SDRAM SDRAM AS4SD4M16 AS4SD4M16 Rev. 2.1 6/05 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 47 Austin Semiconductor, Inc. WRITE -- FULL-PAGE BURST 123 123 123 123 123 123 123 123 123 123 1234 1234 1234 1234 1234 1234 123 123 123 123 123 12 12 12 12 12 t CK t CH t CL 123456 123456 123456 123456 123456 123456 12 12 12 12 12 123 123 123 123 123 1234 1234 1234 1234 1234 1234 12 12 12 12 12 123 123 123 123 123 12 12 12 12 12 12 12 12 12 12 12345 12345 12345 12345 12345 12345 123 123 123 123 123 123 123 123 123 123 t CKS tCKH t CMS t CMH 1234 1234 1234 1234 1234 123 123 123 123 123 123 123 123 123 123 12 12 12 12 12 123 123 123 123 123 123 123 123 123 123 ACTIVE NOP WRITE NOP NOP NOP 1234567890123456789 1234567890123456789 1234567890123456789 1234567890123456789 1234567890123456789 12345678 12345678 12345678 12345678 12345678 12345678 12345678 123456 123456 123456 123456 123456 CMH 12 12 12 12 12 12 12 12 12 12 12345 12345 12345 12345 12345 123 123 123 123 123 123 123 123 123 123 1234 1234 1234 1234 1234 12345678 12345678 12345678 12345678 12345678 1234 1234 1234 1234 1234 1234 1234 1234 1234 1234 1234 1234567 1234567 1234567 1234567 1234567 1234567 1234567 1234567 1234567 1234567 1234567 1234567 123456789 123456789 123456789 123456789 123456789 123456789 ROW t CMS t AH t AS t AH t AS t 1234 1234 1234 1234 1234 1234567 1234567 1234567 1234567 1234567 123456 123456 123456 123456 123456 12345678 12345678 12345678 12345678 12345678 BANK 123456 123456 123456 123456 123456 AH t AS t BANK 123 123 123 123 123 12 12 12 12 12 1234 1234 1234 1234 1234 1234 123 123 123 123 123 123 123 123 123 123 12 12 12 12 12 12 12 12 12 12 12345 12345 12345 12345 12345 12345 123 123 123 123 123 123 123 123 123 123 12 12 12 12 12 123 123 123 123 123 1234 1234 1234 1234 1234 1234 12 12 12 12 12 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123 1234 1234 1234 1234 1234 1234 123 123 123 123 123 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12345 12345 12345 12345 12345 12345 123 123 123 123 123 123 123 123 123 123 12 12 12 12 12 12 12 12 12 12 BURST TERM 12 12 12 12 12 12 12 12 12 12 1234 1234 1234 1234 1234 123 123 123 123 123 123 123 123 123 123 COLUMN m1 123456 123456 123456 123456 123456 123456 1234567890123456789012345678901212345678901234 1234567890123456789012345678901212345678901234 1234567890123456789012345678901212345678901234 1234567890123456789012345678901212345678901234 1234567890123456789012345678901212345678901234 1234567890123456789012345678901212345678901234 1234 1234 1234 1234 1234 123456 123456 123456 123456 123456 ROW 1234567890123456789012345678901212345678901234567890123456789012123 1234567890123456789012345678901212345678901234567890123456789012123 1234567890123456789012345678901212345678901234567890123456789012123 1234567890123456789012345678901212345678901234567890123456789012123 1234567890123456789012345678901212345678901234567890123456789012123 12 12 12 12 12 1234567890123456789012345678901212345678901234 1234567890123456789012345678901212345678901234 1234567890123456789012345678901212345678901234 1234567890123456789012345678901212345678901234 1234567890123456789012345678901212345678901234 t RCD NOP 12 12 12 12 12 NOP 12 12 12 12 12 12 12 12 12 12 1234 1234 1234 1234 1234 12 12 12 12 12 123 123 123 123 123 12 12 12 12 12 12 12 12 12 12 12345 12345 12345 12345 12345 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123 1234 1234 1234 1234 1234 123 123 123 123 123 123 123 123 123 123 256 (x16) locations within same row. Full page completed. Full-page burst does not self-terminate. Can use BURST TERMINATE command.2,3 123 123 123 123 123 123 D IN m+1 t DS 123 123 123 123 123 123 D IN m+2 D IN m+3 123456 123456 123456 123456 123456 123456 123456789012345678 123456789012345678 123456789012345678 123456789012345678 123456789012345678 123456789012345678 D IN m 123 123 123 123 123 123 t DH t DS t DH t DS t DH t DS t DH 123 123 123 123 123 123 D IN m-1 DS DH 12 12 12 12 12 12 1234567 1234567 1234567 1234567 1234567 1234567 123456 123456 123456 123456 123456 123456 1234 1234 1234 1234 1234 DS DH t t t t 123456789 123456789 123456789 123456789 123456789 123456789 1 1 1 1 1 1 1 1 1 1 T0 T1 T2 T3 T4 T5 Tn+1 Tn+2 Tn+3 1234 1234 1234 1234 1234 1234 1234 1234 Don’t Care Undefined CLK CKE COMMAND DQM / DQML, DQMH A0-A9, A11 BA0, BA1 DQ A10 TIMING PARAMETERS * CAS latency indicated in parentheseses. NOTES: 1. x16: A8, A9 and A11 = “Don’t Care.” 2. tWR must be satisfied prior to PRECHARGE command. 3. Page left open, no t RP . MIN MAX MIN MAX tAH 11 ns tAS 23 ns tCH 33.5 ns tCL 33.5 ns tCK(3) 810 ns tCK(2) 12 15 ns tCKH 11 ns UNITS SYMBOL* -8 -10 MIN MAX MIN MAX tCKS 23 ns tCMH 11 ns tCMS 23 ns tDH 11 ns tDS 23 ns tRCD 20 30 ns UNITS SYMBOL* -8 -10 |
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