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AS4SD4M16DG-10/IT Datasheet(PDF) 36 Page - Austin Semiconductor |
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AS4SD4M16DG-10/IT Datasheet(HTML) 36 Page - Austin Semiconductor |
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36 / 50 page  SDRAM SDRAM SDRAM SDRAM SDRAM AS4SD4M16 AS4SD4M16 Rev. 2.1 6/05 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 36 Austin Semiconductor, Inc. tCK tCH tCL T0 T1 T2 T4 T6 T7 T8 T9 T3 T5 12 12 12 12 12 12 12 12 1234 1234 1234 1234 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 1234 1234 1234 1234 12 12 12 12 12 12 12 12 12345 12345 12345 12345 123456 123456 123456 123456 tCKS tCKH 12 12 12 12 12 12 12 12 1234 1234 1234 1234 123 123 123 123 123 123 123 123 123 123 123 123 12 12 12 12 1234 1234 1234 1234 123 123 123 123 12 12 12 12 12 12 12 12 123 123 123 123 1234 1234 1234 1234 12 12 12 12 123 123 123 123 12345 12345 12345 12345 123456 123456 123456 123456 12 12 12 12 12 12 12 12 1234 1234 1234 1234 123 123 123 123 123 123 123 123 12 12 12 12 12 12 12 12 1234 1234 1234 1234 12 12 12 12 12 12 12 12 123 123 123 123 12345 12345 12345 12345 12 12 12 12 12345 12345 12345 12345 123456 123456 123456 123456 READ NOP 12345 12345 12345 12345 12 12 12 12 12 12 12 12 tCMS tCMH t t CKS CKH NOP 123 123 123 123 NOP NOP 123 123 123 123 123 123 123 123 NOP WRITE 123456 123456 123456 123456 12345 12345 12345 12345 1234567 1234567 1234567 1234567 1 1 1 1 1 1 1 1 12345 12345 12345 12345 NOP COMMAND 12345 12345 12345 12345 1234567890 1234567890 1234567890 1234567890 12 12 12 12 123 123 123 123 12 12 12 12 1234 1234 1234 1234 123 123 123 123 12 12 12 12 tCMS tCMH 123 123 123 123 1234567890123456789012345678901212345 1234567890123456789012345678901212345 1234567890123456789012345678901212345 1234567890123456789012345678901212345 12 12 12 12 123 123 123 123 123 123 123 123 12 12 12 12 1234567890123 1234567890123 1234567890123 1234567890123 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 1234 1234 1234 1234 12 12 12 12 12 12 12 12 12345 12345 12345 12345 12345 COLUMN m2 tAS tAH 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 123456789012345678901234567890121234567890123456 123456789012345678901234567890121234567890123456 123456789012345678901234567890121234567890123456 123456789012345678901234567890121234567890123456 123456789012345678901234567890121234567890123456 1 1 1 1 1 12 12 12 12 12 COLUMN e2 12345 12345 12345 12345 12345 123456789012345678 123456789012345678 123456789012345678 123456789012345678 123456789012345678 1 1 1 1 1 1 1 1 1 1 12 12 12 12 12 12 12 12 12 12 12 12 12 1234567890123456789012345678901212345678901234567890 1234567890123456789012345678901212345678901234567890 1234567890123456789012345678901212345678901234567890 1234567890123456789012345678901212345678901234567890 1234567890123456789012345678901212345678901234567890 123 123 123 123 123 123 123 123 123 12 12 12 12 12 123456789012345678901 123456789012345678901 123456789012345678901 123456789012345678901 123456789012345678901 12 12 12 12 tAS tAH 12 12 12 12 12 12 12 12 12345 12345 12345 12345 BANK tAS tAH 12345 12345 12345 12345 12345 12345 12345 12345 123456789012345678901234567890121234567890123456 123456789012345678901234567890121234567890123456 123456789012345678901234567890121234567890123456 123456789012345678901234567890121234567890123456 1 1 1 1 12 12 12 12 BANK 12345 12345 12345 12345 123456789012345678 123456789012345678 123456789012345678 123456789012345678 1 1 1 1 1 1 1 1 1234567 1234567 1234567 1234567 1234567 1234567 1234567 1234567 1234567 1234567 12345 12345 12345 12345 12345 12 12 12 12 12 1 1 1 1 1 DOUT m 1234567 1234567 1234567 1234567 1234567 1234567 1234567 1234567 1234567 1234567 1234 1234 1234 1234 1234 12 12 12 12 12 12 12 12 12 12 DOUTm+1 12345 12345 12345 12345 12345 12345 12345 12345 1234 1234 1234 1234 1 1 1 1 12 12 12 12 DOUT a DOUT a-1 123456 123456 123456 123456 12345 12345 12345 12345 1234567 1234567 1234567 1234567 12 12 12 12 1 1 1 1 12345 12345 12345 12345 tDS tDH tHZ tAC tOH tAC tLZ CLK CKE DQM / DQML, DQMH A0-A9, A11 A10 BA0, BA1 DQ CLOCK SUSPEND MODE1 1234 1234 1234 1234 1234 1234 1234 Don’t Care Undefined TIMING PARAMETERS * CAS latency indicated in parentheses. NOTE: 1. For this example, the burst length = 2, the CAS latency = 3, and AUTO PRECHARGE is disabled. 2. x16: A8, A9 and A11 = “Don’t Care.” MIN MAX MIN MAX tAC(3) 6.5 7 ns tAC(2) 99 ns tAH 11 ns tAS 23 ns tCH 33.5 ns tCL 33.5 ns tCK(3) 810 ns tCK(2) 12 15 ns tCKH 11 ns SYMBOL* UNITS -8 -10 MIN MAX MIN MAX tCKS 23 ns tCMH 11 ns tCMS 23 ns tDH 11 ns tDS 23 ns tHZ(3) 68 ns tHZ(2) 710 ns tLZ 11 ns tOH 2.5 2.5 ns SYMBOL* UNITS -8 -10 |
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