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AS4SD4M16DG-10/IT Datasheet(PDF) 41 Page - Austin Semiconductor |
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AS4SD4M16DG-10/IT Datasheet(HTML) 41 Page - Austin Semiconductor |
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41 / 50 page ![]() SDRAM SDRAM SDRAM SDRAM SDRAM AS4SD4M16 AS4SD4M16 Rev. 2.1 6/05 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 41 Austin Semiconductor, Inc. TIMING PARAMETERS * CAS latency indicated in parentheseses. NOTE: 1. For this example, the burst length = 4, the CAS latency = 2. 2. x16: A8, A9 and A11 = “Don’t Care.” ALTERNATING BANK READ ACCESSES1 12345 12345 12345 12345 12345 12 12 12 12 12 12 12 12 12 12 1234 1234 1234 1234 1234 12 12 12 12 12 123 123 123 123 123 t CK t CH t CL 123456 123456 123456 123456 123456 12 12 12 12 12 12 12 12 12 12 1234 1234 1234 1234 1234 12 12 12 12 12 123 123 123 123 123 123 123 123 123 123 12 12 12 12 12 1234 1234 1234 1234 1234 123 123 123 123 123 123 123 123 123 123 t CKS tCKH t CMS tCMH 123 123 123 123 123 123 123 123 123 123 12 12 12 12 12 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123456 123456 123456 123456 123456 ACTIVE NOP READ NOP ACTIVE NOP NOP 123456789012345678 123456789012345678 123456789012345678 123456789012345678 123456789012345678 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 CMH 12 12 12 12 12 12 12 12 12 12 1234 1234 1234 1234 1234 12 12 12 12 12 123 123 123 123 123 123 123 123 123 123 1234567 1234567 1234567 1234567 1234567 1234567 1234567 1234567 1234567 1234567 12345 12345 12345 12345 12345 ROW 123456 123456 123456 123456 123456 12345 12345 12345 12345 12345 t CMS t AH t AS t ROW AH t AS t AH t AS t 12345678 12345678 12345678 12345678 12345678 12345678 123 123 123 123 123 123 D OUT m t AC t LZ t AC 12 12 12 12 12 12 12 12 12 12 1234 1234 1234 1234 1234 12 12 12 12 12 123 123 123 123 123 12 12 12 12 12 12 12 12 12 12 1234 1234 1234 1234 1234 12 12 12 12 12 123 123 123 123 123 123 123 123 123 123 12 12 12 12 12 1234 1234 1234 1234 1234 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123 12 12 12 12 12 1234 1234 1234 1234 1234 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123 COLUMN m2 123 123 123 123 123 123456 123456 123456 123456 123456 ROW 12345678 12345678 12345678 12345678 12345678 12 12 12 12 12 123456 123456 123456 123456 123456 12345 12345 12345 12345 12345 ROW ENABLE AUTO PRECHARGE 123 123 123 123 123 123 D OUT m+1 AC t 1234 1234 1234 1234 1234 1234 tOH t AC t OH tOH tOH D OUT m+2 D OUT m+3 t RP - BANK 0 t RRD t RC - BANK 0 t RCD - BANK 0 CAS Latency - BANK 0 12 12 12 12 12 123 123 123 123 123 1234 1234 1234 1234 1234 123 123 123 123 123 12 12 12 12 12 READ 1234567 1234567 1234567 1234567 1234567 12 12 12 12 12 12 12 12 12 12 12 12 12 12 t RAS - BANK 0 12 12 12 12 12 123 123 123 123 123 1234 1234 1234 1234 1234 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 123 123 123 123 123 1234 1234 1234 1234 1234 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 123 123 123 123 123 1234 1234 1234 1234 1234 123 123 123 123 123 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 1234 1234 1234 1234 1234 123 123 123 123 123 123 123 123 123 123 12 12 12 12 12 123 123 123 123 123 1234 1234 1234 1234 1234 12 12 12 12 12 12 12 12 12 12 123456 123456 123456 123456 123456 123456 123456 123456 123456 123456 12345 12345 12345 12345 12345 ROW 123456 123456 123456 123456 123456 123456 123456 123456 123456 123456 12345 12345 12345 12345 12345 COLUMN b2 123456 123456 123456 123456 123456 123456 123456 123456 123456 123456 12345 12345 12345 12345 12345 123456 123456 123456 123456 123456 ROW 12345 12345 12345 12345 12345 1234567 1234567 1234567 1234567 1234567 1234567 1234567 12345 12345 12345 12345 12345 123456 123456 123456 123456 123456 12345678 12345678 12345678 12345678 12345678 12 12 12 12 12 ENABLE AUTO PRECHARGE 12345678 12345678 12345678 12345678 12345678 12 12 12 12 12 12 12 12 12 12 123456 123456 123456 123456 123456 1234 1234 1234 1234 1234 12345 12345 12345 12345 12345 1234 1234 1234 1234 1234 1234 1234 1234 1234 1234 1234567 1234567 1234567 1234567 1234567 123 123 123 123 1234 1234 1234 1234 12345678901234 12345678901234 12345678901234 12345678901234 12345678901234 1234 1234 1234 1234 1234 1234 1234 1234 1234567 1234567 1234567 1234567 1234567 1234 1234 1234 1234 1234 1234 1234 1234 1234 1234 1234567890123 1234567890123 1234567890123 1234567890123 1234567890123 123 123 123 123 123 12345 12345 12345 12345 12345 1234 1234 1234 1234 1234 123 123 123 123 123 123 D OUT b 1234 1234 1234 1234 1234 1234 t AC t OH t AC T0 T1 T2 T3 T4 T5 T6 T7 T8 12 12 12 12 12 12 12 12 12 12 12345 12345 12345 12345 12345 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123 12 12 12 12 12 1234 1234 1234 1234 1234 123 123 123 123 123 123 123 123 123 123 ACTIVE BANK 0 BANK 0 BANK 0 BANK 4 BANK 4 CAS Latency - BANK 1 RCD - BANK 1 t RCD - BANK 0 CLK CKE COMMAND DQM / DQML, DQMH A0-A9, A11 BA0, BA1 DQ A10 123 123 123 123 1234 1234 1234 1234 Don’t Care Undefined MIN MAX MIN MAX tAC(3) 6.5 7 ns tAC(2) 99 ns tAH 11 ns tAS 23 ns tCH 3 3.5 ns tCL 3 3.5 ns tCK(3) 810 ns tCK(2) 12 15 ns tCKH 11 ns tCKS 23 ns UNITS SYMBOL* -8 -10 MIN MAX MIN MAX tCMH 11 ns tCMS 23 ns tLZ 11 ns tOH 2.5 2.5 ns tRAS 50 80,000 60 80,000 ns tRC 80 90 ns tRCD 20 30 ns tRP 24 30 ns tRRD 20 20 ns UNITS SYMBOL* -8 -10 |
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