DAC39J84IAAVR datasheet(32/146 Pages) TI

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DAC39J84

SLASE48A – NOVEMBER 2014 – REVISED JANUARY 2015

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Table 7. Receiver Equalizer Hold

EQHOLD

EFFECT

Equalizer adaption enabled. The equalizer adaption and analysis algorithm is enabled. This should be the default state.

Equalizer adaption held. The equalizer is held in it’s current state. Additionally, the adaption and analysis algorithm is reset. See

section 7.2.5.1 for further details..

Table 8. Receiver Equalizer Gain Boost

EQBoost

GAIN BOOST

BANDWIDTH CHANGE

POWER INCREASE

VALUE

(dB)

(%)

(mW)

–30

–20

When EQ is set to 010 or 011, the equalizer is reconfigured to provide analytical data about the amount of pre

and post cursor equalization respectively present in the received signal. This can in turn be used to adjust the

equalization settings of the transmitting link partner, where a suitable mechanism for communicating this data

back to the transmitter exists. Status information is provided viadtest[11:8] (EQOVER, EQUNDER), by using the

following method:

1. Enable the equalizer by setting EQHLD low and EQ to 001. Allow sufficient time for the equalizer to adapt;

2. Set EQHLD to 1 to lock the equalizer and reset the adaption algorithm. This also causes both EQOVER and

EQUNDER to become low;

3. Wait at least 48UI, and proportionately longer if the CDR activity is less than 100%, to ensure the 1 on

EQHLD is sampled and acted upon;

4. Set EQ to 010 or 011, and EQHLD to 0. The equalization characteristics of the received signal are analysed

(the equalizer response will continue to be locked);

5. Wait at least 150×103UI to allow time for the analysis to occur, proportionately longer if the CDR activity is

less than 100%;

6. Examine EQOVER and EQUNDER for results of analysis.

–

If EQOVER is high, it indicates the signal is over equalized;

–

If EQUNDER is high, it indicates the signal is under equalized;

7. Set EQHLD to 1;

8. Repeat items 3–7 if required;

9. Set EQ to 001, and EQHLD to 0 to exit analysis mode and return to normal adaptive equalization.

Note that when changing EQ from one non-zero value to another, EQHLD must already be 1. If this is not the

case, there is a chance the equalizer could be reset by a transitory input state (i.e., if EQ is momentarily 000).

EQHLD can be set to 0 at the same time as EQ is changed.

As the equalizer adaption algorithm is designed to equalize the post cursor, EQOVER or EQUNDER will only be

set during post cursor analysis if the amount of post cursor equalization required is more or less than the

adaptive equalizer can provide.

7.3.5 JESD204B Descrambler

The descrambler is a 16-bit parallel self-synchronous descrambler based on the polynomial 1 + x14 + x15. From

the JESD204B specification, the scrambling/descrambling process only occurs on the user data, not on the code

group synchronization or the ILA sequence. The descrambler output can be selected to sent out during JESD

test, see jesd_testbus_sel for the specific configuration needed.

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