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DAC39J84IAAVR Datasheet(PDF) 61 Page - Texas Instruments |
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DAC39J84IAAVR Datasheet(HTML) 61 Page - Texas Instruments |
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61 / 146 page ![]() PLL VCO Coars Tuning Bits 0 8 16 24 32 40 48 56 64 3500 3750 4000 4250 4500 4750 5000 5250 5500 5750 6000 High Band VCO Low Band VCO DAC39J84 www.ti.com SLASE48A – NOVEMBER 2014 – REVISED JANUARY 2015 Device Functional Modes (continued) Figure 80. Typical PLL VCO Center Frequency vs Coarse Tuning Bits Common wireless infrastructure frequencies are generated from this VCO frequency in conjunction with the pre- scaler setting pll_p in register config50 as shown in Table 28. When there are multiple valid VCO frequency and the pre-scaler settings to generate the same desired DACCLK frequency, higher pre-scaler divider ratio is recommended for better phase noise performance. Table 28. VCO Operation VCO FREQUENCY (MHz) pll_vcosel PRE-SCALE DIVIDER DESIRED DACCLK (MHz) pll_p(3:0) 4915.2 0 2 2457.6 0000 3932.16 1 2 1966.08 0000 4423.68 1 3 1474.56 0001 4915.2 0 4 1228.8 0010 4915.2 0 5 983.04 0011 5160.96 0 7 737.28 0101 4915.2 0 8 614.4 0110 4915.2 0 10 491.52 0111 Copyright © 2014–2015, Texas Instruments Incorporated Submit Documentation Feedback 61 Product Folder Links: DAC39J84 |
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