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DAC39J84IAAVR Datasheet(PDF) 63 Page - Texas Instruments |
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DAC39J84IAAVR Datasheet(HTML) 63 Page - Texas Instruments |
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63 / 146 page  DAC39J84 www.ti.com SLASE48A – NOVEMBER 2014 – REVISED JANUARY 2015 Table 30. Register Map (MSB) (LSB) Name Address Default Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 15 Bit 0, alarm_zer alarm_ qmc_ qmc_ qmc_ qmc _corrab os outsum zeros alarm_out alarm inv_sinc inv_sinc config0 0x00 0x0218 offsetab offsetcd corrcd interp(3:0) pap _ena _ena _txenable _ena _jesd _ena _out_pol _ab _ena _cd_ena _ena _ena _ena _ena data_ena daca_ dacb_ dacc_ dacd_ sfrac_ sfrac_ lfrac_ lfrac_ sfrac_ config1 0x01 0x0003 sfrac_ sel_ab reserved reserved complime complime complime complime reserved reserved reserved reserved ena_ab ena_cd ena_ab ena_cd sel_cd nt nt nt nt zer _invalid shorttest mixer mixer config2 0x02 0x2002 dac_bitwidth(1:0) reserved reserved reserved reserved sif4 _ena nco _ena reserved reserved twos sif_reset _data _ena _ena _gain fif _error _zeros config3 0x03 0xF380 coarse_dac(3:0) reserved reserved sif _txenable _data _ena config4 0x04 0x00FF alarms_mask(15:0) config5 0x05 0xFFFF alarms_mask(31:16) config6 0x06 0xFFFF alarms_mask(47:32) config7 0x07 0x0000 memin_tempdata(7:0) reserved memin_lane_skew(4:0) config8 0x08 0x0000 reserved reserved reserved qmc_offseta(12:0) config9 0x09 0x0000 reserved reserved reserved qmc_offsetb(12:0) config10 0x0A 0x0000 reserved reserved reserved qmc_offsetc(12:0) config11 0x0B 0x0000 reserved reserved reserved qmc_offsetd(12:0) config12 0x0C 0x0400 reserved reserved reserved reserved reserved qmc_gaina(10:0) config13 0x0D 0x0400 fs8 fs4 fs2 fsm4 reserved qmc_gainb(10:0) config14 0x0E 0x0400 reserved reserved reserved reserved reserved qmc_gainc(10:0) output _delayab output _delaycd config15 0x0F 0x0400 reserved qmc_gaind(10:0) _reserved(1:0) _reserved(1:0) config16 0x10 0x0000 reserved reserved reserved reserved qmc_phaseab(11:0) config17 0x11 0x0000 reserved reserved reserved reserved qmc_phasecd(11:0) config18 0x12 0x0000 phaseoffsetab(15:0) config19 0x13 0x0000 phaseoffsetcd(15:0) config20 0x14 0x0000 phaseaddab(15:0) config21 0x15 0x0000 phaseaddab(31:16) config22 0x16 0x0000 phaseaddab(47:32) config23 0x17 0x0000 phaseaddcd(15:0) config24 0x18 0x0000 phaseaddcd(31:16) config25 0x19 0x0000 phaseaddcd(47:32) vbgr biasopam tsense clkrecv daca dacb dacc config26 0x1A 0x0020 reserved reserved pll _sleep dacd _sleep _sleep p _sleep _sleep _sleep _sleep _sleep _sleep extref config27 0x1B 0x0000 dtest_lane(2:0) dtest(3:0) reserved reserved atest(5:0) _ena config28 0x1C 0x0000 reserved reserved config29 0x1D 0x0000 reserved reserved config30 0x1E 0x1111 syncsel_qmoffsetab(3:0) syncsel_qmoffsetcd(3:0) syncsel_qmcorrab(3:0) syncsel_qmcorrcd(3:0) config31 0x1F 0x1140 syncsel_mixerab(3:0) syncsel_mixercd(3:0) syncsel_nco(3:0) reserved sif_sync reserved Copyright © 2014–2015, Texas Instruments Incorporated Submit Documentation Feedback 63 Product Folder Links: DAC39J84 |
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