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SPC574K72E5 Datasheet(PDF) 68 Page - STMicroelectronics |
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SPC574K72E5 Datasheet(HTML) 68 Page - STMicroelectronics |
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68 / 127 page ![]() Electrical characteristics SPC574Kxx 68/127 DocID023601 Rev 5 Figure 18. LVDS pad external load diagram 3.13.3 LFAST PLL electrical characteristics 3. Valid for maximum data rate fDATA. Value given is the capacitance on each terminal of the differential pair, as shown in Figure 18. 4. Valid for maximum external load CL. CL CL 1pF 1pF 2.5pF 2.5pF 100Ω terminator bond pad GPIO Driver GPIO Driver LVDS Driver Die Package PCB bond pad The following table contains the electrical characteristics for the LFAST PLL. Table 34. LFAST PLL electrical characteristics(1) Symbol C Parameter Conditions Value Unit Min Nominal Max fRF_REF SR D PLL reference clock frequency — 10 — 26 MHz ERRREF CC D PLL input reference clock frequency error —–1 — 1 % DCREF CC D PLL input reference clock duty cycle — 45 — 55 % |
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