SPC574K72E5 datasheet(32/127 Pages) STMICROELECTRONICS

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Electrical characteristics

SPC574Kxx

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DocID023601 Rev 5

Table 15 provides weak pull figures. Both pull-up and pull-down current specifications are

provided.

VIHCMOS

(5)

Input high level CMOS



(without hysteresis)

3.0 V < VDD_HV_IO < 3.6 V

0.6 *

VDD_HV_IO

—VDD_HV_IO

+ 0.3

4.75 V < VDD_HV_IO < 5.25 V

VILCMOS_H

(5) SR

Input low level CMOS



(with hysteresis)

3.0 V < VDD_HV_IO < 3.6 V

–0.3

—

0.35 *

VDD_HV_IO

4.75 V < VDD_HV_IO < 5.25 V

VILCMOS

(5)

Input low level CMOS



(without hysteresis)

3.0 V < VDD_HV_IO < 3.6 V

–0.3

—

0.4 *

VDD_HV_IO

4.75 V < VDD_HV_IO < 5.25 V

VHYSCMOS

—

Input hysteresis CMOS

3.0 V < VDD_HV_IO < 3.6 V

0.1 *

VDD_HV_IO

——

4.75 V < VDD_HV_IO < 5.25 V

(6)

VDRFTCMOS

—

Input VIL/VIH

temperature drift

CMOS

3.0 V < VDD_HV_IO < 3.6 V

—

100(4)

4.75 V < VDD_HV_IO < 5.25 V

INPUT CHARACTERISTICS(7)

ILKG

Digital input leakage

4.5 V < VDD_HV < 5.5 V

0.1*VDD_HV < VIN < 0.9*VDD_HV

TJ < 150 °C

——

µA

ILKG_MED

Digital input leakage for

MEDIUM pad

4.5 V < VDD_HV < 5.5 V

VSS_HV < VIN < VDD_HV

—

500

CIN

Digital input

capacitance

GPIO input pins

—

Ethernet input pins

—

A good approximation for the variation of the minimum value with supply is given by formula VIHAUT = 0.69 × VDD_HV_IO.

A good approximation for the variation of the maximum value with supply is given by formula VILAUT = 0.49 × VDD_HV_IO.

A good approximation of the variation of the minimum value with supply is given by formula VHYSAUT = 0.11 × VDD_HV_IO.

In a 1 ms period, assuming stable voltage and a temperature variation of ±30 °C, VIL/VIH shift is within ±50 mV. For SENT

requirement refer to Note: on page 41.

Only for VDD_HV_IO_JTAG and VDD_HV_IO_FLEX power segment. The TTL threshold are controlled by the VSIO bit.

VSIO[VSIO_xx] = 0 in the range 3.0 V < VDD_HV_IO < 3.6 V, VSIO[VSIO_xx] = 1 in the range 4.5 V < VDD_HV_IO < 5.5 V.

Only for VDD_HV_IO_JTAG and VDD_HV_IO_FLEX power segment.

For LFAST, microsecond bus and LVDS input characteristics, refer to dedicated communication module chapters.

Table 14. I/O input DC electrical characteristics(Continued)

Symbol

Parameter

Conditions

Value

Unit

Min

Typ

Max

SPC574K72E5 Datasheet(PDF) 32 Page - STMicroelectronics

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