PDP83TG720SWCSTQ1 datasheet(132/199 Pages) TI

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7.6.2.74 PRBS_CTRL_4 Register (Address = 0x624) [reset = 0x5511]

PRBS_CTRL_4 is shown in Table 7-97.

Return to the Summary Table.

Table 7-97. PRBS_CTRL_4 Register Field Descriptions

Bit

Field

Type

Reset

Description

15-8

cfg_pkt_data

R/W

8b01010101 Fixed data to be sent in Fix data mode

7-6

cfg_pkt_mode

R/W

2b00

2'b00 - Incremental 2'b01 - Fixed 2'b1x - PRBS

2b00 = Incremental

2b01 = Fixed

5-3

cfg_pattern_vld_bytes

R/W

3b010

Number of bytes of valid pattern in packet (Max - 6)

3b000 = 0 bytes

3b001 = 1 bytes

3b010 = 2 bytes

3b011 = 3 bytes

3b100 = 4 bytes

3b101 = 5 bytes

3b110 = 6 bytes

3b111 = 6 bytes

2-0

cfg_pkt_cnt

R/W

3b001

000b = 1 packet 001b = 10 packets 010b = 100 packets 011b = 1000

packets 100b = 10000 packets 101b = 100000 packets 110b =

1000000 packets 111b = Continuous packets

3b000 = 1 packet

3b001 = 10 packets

3b010 = 100 packets

3b011 = 1000 packets

3b100 = 10000 packets

3b101 = 100000 packets

3b110 = 1000000 packets

3b111 = Continuous packets

DP83TG720S-Q1

SNLS604 – SEPTEMBER 2020

www.ti.com

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