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PDP83TG720SWCSTQ1 Datasheet(PDF) 195 Page - Texas Instruments |
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PDP83TG720SWCSTQ1 Datasheet(HTML) 195 Page - Texas Instruments |
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195 / 199 page ![]() www.ti.com EXAMPLE BOARD LAYOUT 32X (0.5) (R0.05) TYP 0.07 MAX ALL AROUND 0.07 MIN ALL AROUND 36X (0.6) 36X (0.25) (5.8) (5.8) ( 3.7) ( 0.2) TYP VIA (0.625) TYP (1.6) TYP (0.625) TYP (1.6) TYP VQFN - 1 mm max height RHA0036A PLASTIC QUAD FLATPACK - NO LEAD 4225089/A 06/2019 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. SYMM SYMM EXPOSED METAL SHOWN LAND PATTERN EXAMPLE SCALE: 15X SEE SOLDER MASK DETAIL 1 9 10 18 19 27 28 36 37 METAL EDGE SOLDER MASK OPENING EXPOSED METAL METAL UNDER SOLDER MASK SOLDER MASK OPENING EXPOSED METAL NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED SOLDER MASK DETAILS www.ti.com DP83TG720S-Q1 SNLS604 – SEPTEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 195 |
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