MCIMX6DP6AYM2AB datasheet(92/160 Pages) NXP

92 / 160 page

i.MX 6DualPlus/6QuadPlus Applications Processors Industrial Products, Rev. 3, 11/2018

NXP Semiconductors

Electrical Characteristics

4.12.10 Image Processing Unit (IPU) Module Parameters

The purpose of the IPU is to provide comprehensive support for the flow of data from an image sensor

and/or to a display device. This support covers all aspects of these activities:

•

Connectivity to relevant devices—cameras, displays, graphics accelerators, and TV encoders.

•

Related image processing and manipulation: sensor image signal processing, display processing,

image conversions, and other related functions.

•

Synchronization and control capabilities, such as avoidance of tearing artifacts.

IC9

Bus free time between a STOP and START condition

4.7

—

1.3

—

µs

IC10

Rise time of both I2Cx_SDA and I2Cx_SCL signals

—

1000

20 + 0.1Cb

300

IC11

Fall time of both I2Cx_SDA and I2Cx_SCL signals

—

300

20 + 0.1Cb

300

IC12

Capacitive load for each bus line (Cb)

—

400

—

400

1 A device must internally provide a hold time of at least 300 ns for I2Cx_SDA signal to bridge the undefined region of the falling

edge of I2Cx_SCL.

2 The maximum hold time has only to be met if the device does not stretch the LOW period (ID no IC5) of the I2Cx_SCL signal.

3 A Fast-mode I2C-bus device can be used in a Standard-mode I2C-bus system, but the requirement of Set-up time (ID No IC7)

of 250 ns must be met. This automatically is the case if the device does not stretch the LOW period of the I2Cx_SCL signal.

If such a device does stretch the LOW period of the I2Cx_SCL signal, it must output the next data bit to the I2Cx_SDA line

max_rise_time (IC9) + data_setup_time (IC7) = 1000 + 250 = 1250 ns (according to the Standard-mode I2C-bus specification)

before the I2Cx_SCL line is released.

4 C

b = total capacitance of one bus line in pF.

Table 57. I2C Module Timing Parameters (continued)

Parameter

Standard Mode

Fast Mode

Unit

Min

Max

Min

Max

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