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MCIMX6DP6AYM2AB Datasheet(PDF) 101 Page - NXP Semiconductors |
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MCIMX6DP6AYM2AB Datasheet(HTML) 101 Page - NXP Semiconductors |
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101 / 160 page  Electrical Characteristics i.MX 6DualPlus/6QuadPlus Applications Processors Industrial Products, Rev. 3, 11/2018 NXP Semiconductors 101 Figure 61. TFT Panels Timing Diagram—Horizontal Sync Pulse Figure 62 depicts the vertical timing (timing of one frame). All parameters shown in the figure are programmable. Figure 62. TFT Panels Timing Diagram—Vertical Sync Pulse DI clock VSYNC HSYNC DRDY D0 D1 IP5o IP13o IP9o IP8o IP8 IP9 Dn IP10 IP7 IP5 IP6 IPP_DISP_CLK IPP _DATA IP14 VSYNC HSYNC DRDY Start of frame End of frame IP12 IP15 IP13 |
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