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DSP56307/D Datasheet(PDF) 9 Page - Motorola, Inc

Part # DSP56307/D
Description  24-BIT DIGITAL SIGNAL PROCESSOR
PDF  156 Pages
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Manufacturer  MOTOROLA [Motorola, Inc]
Direct Link  http://www.freescale.com
Logo MOTOROLA - Motorola, Inc

DSP56307/D Datasheet(HTML) 9 Page - Motorola, Inc

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Signals/Connections
Power
MOTOROLA
DSP56307 Technical Data
1-3
POWER
Table 1-2
Power Inputs
Power Name
Description
VCCP
PLL Power
ÑVCCP is VCC dedicated for PLL use. The voltage should be
well-regulated and the input should be provided with an extremely low
impedance path to the VCC power rail.
VCCQL
Quiet Core (Low) Power
ÑVCCQL is an isolated power for the core
processing logic. This input must be isolated externally from all other chip
power inputs. The user must provide adequate external decoupling
capacitors.
VCCQH
Quiet External (High) Power
ÑVCCQH is a quiet power source for I/O lines.
This input must be tied externally to all other chip power inputs, except
VCCQL. The user must provide adequate decoupling capacitors.
VCCA
Address Bus Power
ÑVCCA is an isolated power for sections of the address
bus I/O drivers. This input must be tied externally to all other chip power
inputs, except VCCQL. The user must provide adequate external decoupling
capacitors.
VCCD
Data Bus Power
ÑVCCD is an isolated power for sections of the data bus I/O
drivers. This input must be tied externally to all other chip power inputs,
except VCCQL. The user must provide adequate external decoupling
capacitors.
VCCC
Bus Control Power
ÑVCCC is an isolated power for the bus control I/O
drivers. This input must be tied externally to all other chip power inputs,
except VCCQL. The user must provide adequate external decoupling
capacitors.
VCCH
Host Power
ÑVCCH is an isolated power for the HI08 I/O drivers. This
input must be tied externally to all other chip power inputs, except VCCQL.
The user must provide adequate external decoupling capacitors.
VCCS
ESSI, SCI, and Timer Power
ÑVCCS is an isolated power for the ESSI, SCI,
and timer I/O drivers. This input must be tied externally to all other chip
power inputs, except VCCQL. The user must provide adequate external
decoupling capacitors.
Not Recommended for New Design



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