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DSP56307/D Datasheet(PDF) 100 Page - Motorola, Inc

Part # DSP56307/D
Description  24-BIT DIGITAL SIGNAL PROCESSOR
PDF  156 Pages
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Manufacturer  MOTOROLA [Motorola, Inc]
Direct Link  http://www.freescale.com
Logo MOTOROLA - Motorola, Inc

DSP56307/D Datasheet(HTML) 100 Page - Motorola, Inc

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DSP56307 Technical Data
MOTOROLA
Specifications
ESSI0/ESSI1 Timing
446 TXC rising edge to FST out (bl) high
Ñ
Ñ
Ñ
Ñ
29.0
15.0
x ck
i ck
ns
447 TXC rising edge to FST out (bl) low
Ñ
Ñ
Ñ
Ñ
31.0
17.0
x ck
i ck
ns
448 TXC rising edge to FST out (wr)
high6
ÑÑ
Ñ
Ñ
31.0
17.0
x ck
i ck
ns
449 TXC rising edge to FST out (wr)
low6
ÑÑ
Ñ
Ñ
33.0
19.0
x ck
i ck
ns
450 TXC rising edge to FST out (wl)
high
ÑÑ
Ñ
Ñ
30.0
16.0
x ck
i ck
ns
451 TXC rising edge to FST out (wl) low
Ñ
Ñ
Ñ
Ñ
31.0
17.0
x ck
i ck
ns
452 TXC rising edge to data out enable
from high impedance
ÑÑ
Ñ
Ñ
31.0
17.0
x ck
i ck
ns
453 TXC rising edge to Transmitter #0
drive enable assertion
ÑÑ
Ñ
Ñ
34.0
20.0
x ck
i ck
ns
454 TXC rising edge to data out valid
Ñ
35 + 0.5
× TC
21.0
Ñ
Ñ
40.0
21.0
x ck
i ck
ns
455 TXC rising edge to data out high
impedance7
ÑÑ
Ñ
Ñ
31.0
16.0
x ck
i ck
ns
456 TXC rising edge to Transmitter #0
drive enable deassertion7
ÑÑ
Ñ
Ñ
34.0
20.0
x ck
i ck
ns
457 FST input (bl, wr) setup time before
TXC falling edge6
Ñ
Ñ
2.0
21.0
Ñ
Ñ
x ck
i ck
ns
458 FST input (wl) to data out enable
from high impedance
Ñ
Ñ
Ñ
27.0
—ns
459 FST input (wl) to Transmitter #0
drive enable assertion
Ñ
Ñ
Ñ
31.0
Ñ
ns
460 FST input (wl) setup time before
TXC falling edge
Ñ
Ñ
2.0
21.0
Ñ
Ñ
x ck
i ck
ns
461 FST input hold time after TXC
falling edge
Ñ
Ñ
4.0
0.0
Ñ
Ñ
x ck
i ck
ns
462 Flag output valid after TXC rising
edge
ÑÑ
Ñ
Ñ
32.0
18.0
x ck
i ck
ns
Table 2-21
ESSI Timings (Continued)
No.
Characteristics1, 2, 3
Symbol
Expression
100 MHz Cond-
ition4
Unit
Min Max
Not Recommended for New Design



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