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HC805K3GRS/D Datasheet(PDF) 28 Page - NXP Semiconductors |
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HC805K3GRS/D Datasheet(HTML) 28 Page - NXP Semiconductors |
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28 / 119 page ![]() General Release Specification Introduction MC68HC805K3 — Rev. 1.0 28 Memory Map 2.2 Introduction The MC68HC805K3 has several input/output (I/O) features, 64 bytes of user read-only memory (RAM), 128 bits of personality user electronically erasable programmable read-only memory (PEEPROM), and 928 bytes of user EEPROM, which are all active in the single-chip mode as shown in Figure 2-1. Figure 2-1. MC68HC805K3 Single-Chip Mode Memory Map USER VECTORS EEPROM 8 BYTES USER EEPROM 160 BYTES 1023 1016 STACK 32 BYTES USER RAM 64 BYTES RESET VECTOR (LOW BYTE) RESET VECTOR (HIGH BYTE) SWI VECTOR (LOW BYTE) SWI VECTOR (HIGH BYTE) IRQ VECTOR (LOW BYTE) IRQ VECTOR (HIGH BYTE) TIMER VECTOR (LOW BYTE) TIMER VECTOR (HIGH BYTE) $03F8 $03F9 $03FA $03FB $03FC $03FD $03FE $03FF * $0100 TO $03F7 INCLUDES COP RESET ADDRESS $0100 $00FF 0255 0256 I/O 32 BYTES SEE FIGURE 2-2 0032 0031 0000 $03FF $03F8 $03F7 $00E0 $00DF $0020 $001F $0000 USER EEPROM 760 BYTES * 0224 0223 0192 0191 $00C0 $00BF 1008 $03F0 COP WATCHDOG TIMER Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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