HC805K3GRSSLASHD datasheet(79/119 Pages) NXP

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MC68HC805K3 — Rev. 1.0

Personality EEPROM

General Release Specification — MC68HC805K3

Section 9. Personality EEPROM

9.1 Contents

9.2

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .79

9.3

PEEPROM Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .81

9.3.1

PEEPROM Bit Select Register (PEBSR) . . . . . . . . . . . . . .81

9.3.2

PEEPROM Status/Control Register (PESCR) . . . . . . . . . .82

9.4

PEEPROM Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . .86

9.2 Introduction

The MC68HC805K3 contains a 128-bit personality EEPROM

(PEEPROM) for storage of variables or user data. These 128 bits are

provided as a simple EEPROM array and control logic that requires

serial reading of the data. The PEEPROM may be accessed via software

programmed into the user EEPROM through two registers that directly

interface with the PEEPROM array. The actual implementation of the

software varies depending on customer requirements. The PEEPROM

array is arranged as 16 bytes (rows) with a separate column select for

each bit (column) in a byte. The column select connects the bit to a

single sense amplifier as shown in the block diagram of the PEEPROM

module in Figure 9-1.

An on-chip charge pump is provided to allow programming and erasure

of the Personality EEPROM if the supply voltage to the VDD pin is at least

3.0 Vdc.

NOTE:

Programming and erasure of the personality EEPROM may only be

performed if VDD > 3.0 Vdc.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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