HC805K3GRSSLASHD datasheet(74/119 Pages) NXP

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General Release Speciﬁcation

Timer Registers

MC68HC805K3 — Rev. 1.0

8-Bit Timer

8.3.2 Timer Status/Control Register (TSCR) $08

The TSCR contains the timer interrupt flag, the timer interrupt enable

bits, and the real time interrupt rate select bits. Bit 2 and bit 3 are write-

only bits that read as logical zeros. Figure 8-3 shows the value of each

bit in the TSCR following reset.

TOF — Timer Overflow

The TOF is a read-only flag bit that is set when the 8-bit ripple counter

rolls over from $FF to $00. A timer interrupt request is generated if

TOF is set when TOIE is also set. The TOF flag bit is reset by writing

a logical one to the TOFR acknowledge bit. Writing to the TOF flag bit

has no effect on its value. This bit is cleared by reset.

RTIF — Real Time Interrupt Flag

The RTIF is a read-only flag bit that is set when the output of the

chosen (one-of-four selection) real time interrupt stage goes active. A

timer interrupt request is generated if RTIF is set when RTIE is also

set. The RTIF flag bit is reset by writing a logical one to the RTIFR

acknowledge bit. Writing to the RTIF flag bit has no effect on its value.

This bit is cleared by reset.

TOIE — Timer Overflow Interrupt Enable

The TOIE is an enable bit that allows generation of a timer interrupt.

When the TOIE enable bit is set, the TIMER Interrupt is generated

when the TOF flag bit is set. This bit is cleared by reset.

$08

Bit 7

6543

Bit 0

Read:

TOF

RTIF

TOIE

RTIE

RT1

RT0

Write:

TOFR

RTIFR

Reset:

00000

= Unimplemented

Figure 8-3. Timer Status/Control Register

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

HC805K3GRS/D Datasheet(PDF) 74 Page - NXP Semiconductors

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