PIC12C67X datasheet(22/129 Pages) MICROCHIP

22 / 129 page

PIC12C67X

DS30561B-page 22

4.3

PCL and PCLATH

The Program Counter (PC) is 13-bits wide. The low

byte comes from the PCL Register, which is a readable

and writable register. The high byte (PC<12:8>) is not

directly readable or writable and comes from PCLATH.

On any reset, the PC is cleared. Figure 4-3 shows the

two situations for the loading of the PC. The upper

example in the figure shows how the PC is loaded on a

write to PCL (PCLATH<4:0>

→ PCH). The lower exam-

ple in the figure shows how the PC is loaded during a

CALL

or GOTO instruction (PCLATH<4:3>

→ PCH).

FIGURE 4-3:

LOADING OF PC IN

DIFFERENT SITUATIONS

4.3.1

COMPUTED GOTO

A Computed GOTO is accomplished by adding an off-

set to the program counter (ADDWF PCL). When doing

a table read using a computed GOTO method, care

should be exercised if the table location crosses a PCL

memory boundary (each 256 byte block). Refer to the

application note

“Implementing a Table Read" (AN556).

PCLATH<4:0>

PCLATH

Instruction with

ALU result

GOTO, CALL

Opcode <10:0>

11 10

PCLATH<4:3>

PCH

PCL

PCLATH

PCH

PCL

PCL as

Destination

4.3.2

STACK

The PIC12C67X family has an 8-level deep x 13-bit

wide hardware stack. The stack space is not part of

either program or data space and the stack pointer is

not readable or writable. The PC is PUSHed onto the

stack when a CALL instruction is executed or an inter-

rupt causes a branch. The stack is POPed in the event

of a RETURN, RETLW or a RETFIE instruction execu-

tion. PCLATH is not affected by a PUSH or POP oper-

ation.

The stack operates as a circular buffer. This means that

after the stack has been PUSHed eight times, the ninth

push overwrites the value that was stored from the first

push. The tenth push overwrites the second push (and

so on).

4.4

Program Memory Paging

The

PIC12C67X

ignores

both

paging

bits

PCLATH<4:3>, which are used to access program

memory when more than one page is available. The

use of PCLATH<4:3> as general purpose read/write

bits for the PIC12C67X is not recommended since this

may affect upward compatibility with future products.

Note 1: There are no status bits to indicate stack

overflow or stack underflow conditions.

2: There are no instructions/mnemonics

called PUSH or POP. These are actions

that occur from the execution of the

CALL, RETURN, RETLW,

and RETFIE

instructions, or the vectoring to an inter-

rupt address.

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