PIC12C67X datasheet(67/129 Pages) MICROCHIP

67 / 129 page

DS30561B-page 67

PIC12C67X

FIGURE 9-16: WAKE-UP FROM SLEEP THROUGH INTERRUPT

Q3 Q4

Q1 Q2

Q2 Q3 Q4

Q1 Q2 Q3 Q4

Q2 Q3

Q1 Q2

OSC1

CLKOUT(4)

GPIO pin

GPIF flag

(INTCON<0>)

GIE bit

(INTCON<7>)

INSTRUCTION FLOW

Instruction

fetched

Instruction

executed

PC+1

PC+2

Inst(PC) = SLEEP

Inst(PC - 1)

Inst(PC + 1)

SLEEP

Processor in

SLEEP

Interrupt Latency

(Note 3)

Inst(PC + 2)

Inst(PC + 1)

Inst(0004h)

Inst(0005h)

Inst(0004h)

Dummy cycle

PC + 2

0004h

0005h

Dummy cycle

TOST(2)

PC+2

Note 1: XT, HS or LP oscillator mode assumed.

2: TOST = 1024TOSC (drawing not to scale) This delay will not be there for INTRC and EXTRC osc mode.

3: GIE = ’1’ assumed. In this case after wake- up, the processor jumps to the interrupt routine. If GIE = ’0’, execution will

continue in-line.

4: CLKOUT is not available in XT, HS or LP osc modes, but shown here for timing reference.

9.9

Program Verification/Code Protection

If the code protection bit(s) have not been pro-

grammed, the on-chip program memory can be read

out for verification purposes.

9.10

ID Locations

Four memory locations (2000h - 2003h) are designated

as ID locations, where the user can store checksum or

other code-identification numbers. These locations are

not accessible during normal execution, but are read-

able and writable during program/verify. It is recom-

mended that only the 4 least significant bits of the ID

location are used.

9.11

In-Circuit Serial Programming

PIC12C67X microcontrollers can be serially pro-

grammed while in the end application circuit. This is

simply done with two lines for clock and data, and three

other lines for power, ground and the programming volt-

age. This allows customers to manufacture boards with

unprogrammed devices, and then program the micro-

controller just before shipping the product. This also

allows the most recent firmware or a custom firmware

to be programmed.

The device is placed into a program/verify mode by

holding the GP1 and GP0 pins low, while raising the

MCLR (VPP) pin from VIL to VIHH (see programming

specification). GP1 (clock) becomes the programming

clock and GP0 (data) becomes the programming data.

Both GP0 and GP1 are Schmitt Trigger inputs in this

mode.

Note:

Microchip does not recommend code pro-

tecting windowed devices.

After reset, and if the device is placed into program-

ming/verify mode, the program counter (PC) is at loca-

tion 00h. A 6-bit command is then supplied to the

device. Depending on the command, 14-bits of pro-

gram data are then supplied to or from the device,

depending if the command was a load or a read. For

complete details of serial programming, please refer to

the PIC12C67X Programming Specifications.

FIGURE 9-17: TYPICAL IN-CIRCUIT SERIAL

PROGRAMMING

CONNECTION

External

Connector

Signals

To Normal

Connections

To Normal

Connections

PIC12C67X

VDD

VSS

MCLR/VPP

GP1

GP0

+5V

VPP

CLK

Data I/O

VDD

PIC12C67X Datasheet(PDF) 67 Page - Microchip Technology

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