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PIC12C67X Datasheet(PDF) 12 Page - Microchip Technology |
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PIC12C67X Datasheet(HTML) 12 Page - Microchip Technology |
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12 / 129 page ![]() PIC12C67X DS30561B-page 12 © 1999 Microchip Technology Inc. FIGURE 4-2: PIC12C67X REGISTER FILE MAP INDF(1) TMR0 PCL STATUS FSR GPIO PCLATH INTCON PIR1 ADRES ADCON0 INDF(1) OPTION PCL STATUS FSR TRIS PCLATH INTCON PIE1 PCON ADCON1 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0Ah 0Bh 0Ch 0Dh 0Eh 0Fh 10h 11h 12h 13h 14h 15h 16h 17h 18h 19h 1Ah 1Bh 1Ch 1Dh 1Eh 1Fh 80h 81h 82h 83h 84h 85h 86h 87h 88h 89h 8Ah 8Bh 8Ch 8Dh 8Eh 8Fh 90h 91h 92h 93h 94h 95h 96h 97h 98h 99h 9Ah 9Bh 9Ch 9Dh 9Eh 9Fh 20h A0h General Purpose Register General Purpose Register 7Fh FFh Bank 0 Bank 1 File Address BFh C0h Unimplemented data memory locations, read as ’0’. Note 1: Not a physical register. File Address OSCCAL F0h EFh Mapped in Bank 0 70h 4.2.2 SPECIAL FUNCTION REGISTERS The Special Function Registers are registers used by the CPU and Peripheral Modules for controlling the desired operation of the device. These registers are implemented as static RAM. The Special Function Registers can be classified into two sets (core and peripheral). Those registers associ- ated with the “core” functions are described in this sec- tion, and those related to the operation of the peripheral features are described in the section of that peripheral feature. |
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