PIC12C67X datasheet(23/129 Pages) MICROCHIP

23 / 129 page

DS30561B-page 23

PIC12C67X

4.5

Indirect Addressing, INDF and FSR

Registers

The INDF Register is not a physical register. Address-

ing the INDF Register will cause indirect addressing.

Any instruction using the INDF register actually

accesses the register pointed to by the File Select Reg-

ister, FSR. Reading the INDF Register itself indirectly

(FSR = ’0’) will read 00h. Writing to the INDF Register

indirectly results in a no-operation (although status bits

may be affected). An effective 9-bit address is obtained

by concatenating the 8-bit FSR Register and the IRP bit

(STATUS<7>), as shown in Figure 4-4. However, IRP is

not used in the PIC12C67X.

A simple program to clear RAM locations 20h-2Fh

using indirect addressing is shown in Example 4-1.

EXAMPLE 4-1:

INDIRECT ADDRESSING

movlw

0x20

;initialize pointer

movwf

FSR

;to RAM

clrf

INDF

;clear INDF register

incf

FSR,F

;inc pointer

btfss

FSR,4

;all done?

goto

;no clear next

CONTINUE

;yes continue

FIGURE 4-4:

DIRECT/INDIRECT ADDRESSING

For register file map detail see Figure 4-2.

Note 1:

The RP1 and IRP bits are reserved; always maintain these bits clear.

Data

Memory

Indirect Addressing

Direct Addressing

bank select

location select

RP1 RP0(1)

from opcode

IRP(1)

FSR register

bank select

location select

180h

1FFh

00h

7Fh

Bank 0

Bank 1

Bank 2

Bank 3

not used

PIC12C67X Datasheet(PDF) 23 Page - Microchip Technology

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