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PIC12C67X Datasheet(PDF) 47 Page - Microchip Technology

Part # PIC12C67X
Description  8-Pin, 8-Bit CMOS Microcontroller with A/D Converter and EEPROM Data Memory
PDF  129 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC12C67X Datasheet(HTML) 47 Page - Microchip Technology

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© 1999 Microchip Technology Inc.
DS30561B-page 47
PIC12C67X
The ADRES Register contains the result of the A/D
conversion. When the A/D conversion is complete, the
result is loaded into the ADRES register, the GO/DONE
bit (ADCON0<2>) is cleared, and A/D interrupt flag bit
ADIF (PIE1<6>) is set. The block diagrams of the A/D
module are shown in Figure 8-1.
After the A/D module has been configured as desired,
the selected channel must be acquired before the con-
version is started. The analog input channels must
have their corresponding TRIS bits selected as an
input. To determine sample time, see Section 8.1. After
this acquisition time has elapsed, the A/D conversion
can be started. The following steps should be followed
for doing an A/D conversion:
1.
Configure the A/D module:
• Configure analog pins / voltage reference /
and digital I/O (ADCON1 and TRIS)
• Select A/D input channel (ADCON0)
• Select A/D conversion clock (ADCON0)
• Turn on A/D module (ADCON0)
2.
Configure A/D interrupt (if desired):
• Clear ADIF bit
• Set ADIE bit
• Set GIE bit
3.
Wait the required acquisition time.
4.
Start conversion:
• Set GO/DONE bit (ADCON0)
5.
Wait for A/D conversion to complete, by either:
• Polling for the GO/DONE bit to be cleared
OR
• Waiting for the A/D interrupt
6.
Read A/D Result Register (ADRES), clear bit
ADIF if required.
7.
For the next conversion, go to step 1, step 2 or
step 3 as required. The A/D conversion time per
bit is defined as TAD. A minimum wait of 2TAD is
required before next acquisition starts.
FIGURE 8-1:
A/D BLOCK DIAGRAM
(Input voltage)
VIN
VREF
(Reference
voltage)
VDD
PCFG<2:0>
CHS<1:0>
GP4/AN3
GP0/AN0
GP2/AN2
GP1/AN1/VREF
11
10
01
00
A/D
Converter



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