PIC12C67X datasheet(77/129 Pages) MICROCHIP

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DS30561B-page 77

PIC12C67X

IORWF

Inclusive OR W with f

Syntax:

[

label ]

IORWF

f,d

Operands:

≤ f ≤ 127

∈ [0,1]

Operation:

(W) .OR. (f)

→ (dest)

Status Affected:

Encoding:

0100

dfff

ffff

Description:

Inclusive OR the W register with

placed in the W register. If ’d’ is 1,

the result is placed back in regis-

ter ’f’.

Words:

Cycles:

Example

IORWF

RESULT, 0

Before Instruction

RESULT =

0x13

0x91

After Instruction

RESULT =

0x13

0x93

MOVLW

Move Literal to W

Syntax:

[

label ]

MOVLW k

Operands:

≤ k ≤ 255

Operation:

→ (W)

Status Affected:

None

Encoding:

00xx

kkkk

Description:

The eight bit literal ’k’ is loaded

into W register. The don’t cares

will assemble as 0’s.

Words:

Cycles:

Example

MOVLW

0x5A

After Instruction

0x5A

MOVF

Move f

Syntax:

[

label ]

MOVF f,d

Operands:

≤ f ≤ 127

∈ [0,1]

Operation:

(f)

→ (dest)

Status Affected:

Encoding:

1000

dfff

ffff

Description:

The contents of register f are

moved to a destination dependant

upon the status of d. If d = 0, des-

tination is W register. If d = 1, the

destination is file register f itself.

d = 1 is useful to test a file register

since status flag Z is affected.

Words:

Cycles:

Example

MOVF

FSR,

After Instruction

W = value in FSR register

Z= 1

MOVWF

Move W to f

Syntax:

[

label ]

MOVWF

Operands:

≤ f ≤ 127

Operation:

(W)

→ (f)

Status Affected:

None

Encoding:

0000

1fff

ffff

Description:

Move data from W register to reg-

ister 'f'.

Words:

Cycles:

Example

MOVWF

OPTION

Before Instruction

OPTION =

0xFF

0x4F

After Instruction

OPTION =

0x4F

PIC12C67X Datasheet(PDF) 77 Page - Microchip Technology

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