PIC12C67X datasheet(51/129 Pages) MICROCHIP

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DS30561B-page 51

PIC12C67X

8.5

A/D Operation During Sleep

The A/D module can operate during SLEEP mode. This

requires that the A/D clock source be set to RC

(ADCS<1:0> = 11). When the RC clock source is

selected, the A/D module waits one instruction cycle

before starting the conversion. This allows the SLEEP

instruction to be executed, which eliminates all digital

switching noise from the conversion. When the conver-

sion is completed, the GO/DONE bit will be cleared,

and the result loaded into the ADRES Register. If the

A/D interrupt is enabled, the device will wake-up from

SLEEP. If the A/D interrupt is not enabled, the A/D mod-

ule will then be turned off, although the ADON bit will

remain set.

When the A/D clock source is another clock option (not

RC), a SLEEP instruction will cause the present conver-

sion to be aborted and the A/D module to be turned off,

though the ADON bit will remain set.

Turning off the A/D places the A/D module in its lowest

current consumption state.

8.6

A/D Accuracy/Error

The overall accuracy of the A/D is less than

± 1 LSb for

VDD = 5V

± 10% and the analog VREF = VDD. This over-

all accuracy includes offset error, full scale error, and

integral error. The A/D converter is monotonic over the

full VDD range. The resolution and accuracy may be

less when either the analog reference (VDD) is less than

5.0V or when the analog reference (VREF) is less than

VDD.

The maximum pin leakage current is specified in the

Device Data Sheet electrical specification, parameter

#D060.

In systems where the device frequency is low, use of

the A/D RC clock is preferred. At moderate to high fre-

quencies, TAD should be derived from the device oscil-

lator. TAD must not violate the minimum and should be

≤8 µs for preferred operation. This is because TAD,

when derived from TOSC, is kept away from on-chip

phase clock transitions. This reduces, to a large extent,

the effects of digital switching noise. This is not possible

with the RC derived clock. The loss of accuracy due to

digital switching noise can be significant if many I/O

pins are active.

In systems where the device will enter SLEEP mode

after the start of the A/D conversion, the RC clock

source selection is required. In this mode, the digital

noise from the modules in SLEEP are stopped. This

method gives high accuracy.

Note:

For the A/D module to operate in SLEEP,

the A/D clock source must be set to RC

(ADCS<1:0> = 11). To perform an A/D

conversion in SLEEP, the GO/DONE bit

must be set, followed by the SLEEP

instruction.

8.7

Effects of a Reset

A device reset forces all registers to their reset state.

This forces the A/D module to be turned off, and any

conversion is aborted. The value that is in the ADRES

ter will contain unknown data after a Power-on Reset.

8.8

Connection Considerations

If the input voltage exceeds the rail values (VSS or VDD)

by greater than 0.2V, then the accuracy of the conver-

sion is out of specification.

An external RC filter is sometimes added for anti-

aliasing of the input signal. The R component should be

selected to ensure that the total source impedance is

kept under the 10 k

Ω recommended specification. Any

external components connected (via hi-impedance) to

an analog input pin (capacitor, zener diode, etc.) should

have very little leakage current at the pin.

8.9

Transfer Function

The ideal transfer function of the A/D converter is as fol-

lows: the first transition occurs when the analog input

voltage (VAIN) is 1 LSb (or Analog VREF / 256)

(Figure 8-3).

FIGURE 8-3:

A/D TRANSFER FUNCTION

Note:

For the PIC12C67X, care must be taken

when using the GP4 pin in A/D conversions

due to its proximity to the OSC1 pin.

FFh

FEh

04h

03h

02h

01h

00h

Analog input voltage

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