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PIC12C67X Datasheet(PDF) 97 Page - Microchip Technology |
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PIC12C67X Datasheet(HTML) 97 Page - Microchip Technology |
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97 / 129 page ![]() © 1999 Microchip Technology Inc. DS30561B-page 97 PIC12C67X 12.4 DC CHARACTERISTICS: PIC12LC671/672 (Commercial, Industrial) PIC12LCE673/674 (Commercial, Industrial) DC CHARACTERISTICS Standard Operating Conditions (unless otherwise specified) Operating temperature 0°C ≤ TA ≤ +70°C (commercial) –40°C ≤ TA ≤ +85°C (industrial) Operating voltage VDD range as described in DC spec Section 12.1 and Section 12.2. Param No. Characteristic Sym Min Typ† Max Units Conditions Input Low Voltage I/O ports VIL D030 with TTL buffer VSS — 0.8V V For 4.5V ≤ VDD ≤ 5.5V VSS —0.15VDD Votherwise D031 with Schmitt Trigger buffer VSS —0.2VDD V D032 MCLR, GP2/T0CKI/AN2/INT (in EXTRC mode) VSS —0.2VDD V D033 OSC1 (in EXTRC mode) VSS —0.2VDD V Note 1 D033 OSC1 (in XT, HS, and LP) VSS —0.3VDD V Note 1 Input High Voltage I/O ports VIH — D040 with TTL buffer 2.0V — VDD V4.5V ≤ VDD ≤ 5.5V D040A 0.25VDD + 0.8V — VDD Votherwise D041 with Schmitt Trigger buffer 0.8VDD —VDD VFor entire VDD range D042 MCLR, GP2/T0CKI/AN2/INT 0.8VDD —VDD V D042A OSC1 (XT, HS, and LP) 0.7VDD —VDD V Note 1 D043 OSC1 (in EXTRC mode) 0.9VDD —VDD V Input Leakage Current (Notes 2, 3) D060 I/O ports IIL —— +1 µAVss ≤ VPIN ≤ VDD, Pin at hi-impedance D061 GP3/MCLR (Note 5) +30 µAVss ≤ VPIN ≤ VDD D061A GP3 (Note 6) +5 µAVss ≤ VPIN ≤ VDD D062 GP2/T0CKI — — +5 µAVss ≤ VPIN ≤ VDD D063 OSC1 — — +5 µAVss ≤ VPIN ≤ VDD, XT, HS and LP osc configuration D070 GPIO weak pull-up current (Note 4) IPUR 50 250 400 µAVDD = 5V, VPIN = VSS MCLR pull-up current — — — 30 µAVDD = 5V, VPIN = VSS Output Low Voltage D080 I/O ports VOL —— 0.6 V IOL = 8.5 mA, VDD = 4.5V, –40 °C to +85°C D080A — — 0.6 V IOL = 7.0 mA, VDD = 4.5V, –40 °C to +125°C D083 OSC2/CLKOUT — — 0.6 V IOL = TBD, VDD = 4.5V, –40 °C to +85°C D083A — — 0.6 V IOL = TBD, VDD = 4.5V, –40 °C to +125°C † Data in “Typ” column is at 5V, 25 °C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: In EXTRC oscillator configuration, the OSC1/CLKIN pin is a Schmitt Trigger input. It is not recommended that the PIC12C67X be driven with external clock in RC mode. 2: The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent nor- mal operating conditions. Higher leakage current may be measured at different input voltages. 3: Negative current is defined as coming out of the pin. 4: Does not include GP3. For GP3 see parameters D061 and D061A. 5: This spec. applies to GP3/MCLR configured as external MCLR and GP3/MCLR configured as input with internal pull-up enabled. 6: This spec. applies when GP3/MCLR is configured as an input with pull-up disabled. The leakage current of the MCLR circuit is higher than the standard I/O logic. |
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