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7643 Datasheet(PDF) 48 Page - Renesas Technology Corp |
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7643 Datasheet(HTML) 48 Page - Renesas Technology Corp |
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48 / 424 page ![]() Rev.2.00 Aug 28, 2006 page 31 of 103 REJ09B0133-0200 OVERVIEW FUNCTIONAL DESCRIPTION 7643 Group UART Twelve serial data transfer formats can be selected, and the trans- fer formats used by a transmitter and receiver must be identical. The transmit and receive shift registers each have a buffer, but the two buffers have the same address in a memory. Since the shift register cannot be written to or read from directly, transmit data is written to the transmit buffer register, and receive data is read from the receive buffer register. The transmit buffer register can also hold the next data to be transmitted, and the receive buffer register can hold a character while the next character is being received. The transfer speed (baud rate) is expression as follows: Transfer speed (baud rate) = fi / {(n + 1) ✕ 16 } n: The contents of UART baud rate generator fi: Using UART clock prescaling select bits, select any one of φ, φ/8, φ/32, φ/256 OER PER FER 003416 003516 Receive buffer register 1 Receive buffer register 2 Receive shift register 1 Receive shift register 2 Address 003016 UART mode register UART control register Address 003316 Receive buffer full flag (RBF) Receive buffer full interrupt request (URBF) Receive summing error interrupt request (UES) SPdetector UART character length select bits 7 bits 8 bits 9 bits ST detector P85/URXD P84/UTXD Prescaler 1/1 1/8 1/32 1/256 Baud rate generator ST/SP/PA generator Clock control circuit 1/16 P86/CTS RTS control register P87/RTS Frequency division ratio 1/(n+1) Addresses 003616 Addresses 003116 Character length select bit Transmit shift register 1 Transmit shift register 2 Transmit buffer register 1 Transmit buffer register 2 Transmit comple flag (TCM) Transmit interrupt source select bit Transmit interrupt request (UTX) Transmit buffer empty flag (TBE) UART status register Data bus Data bus φ UART clock prescaling select bits 003416 003516 Address 003216 Fig. 24 UART block diagram |
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