7643 datasheet(165/424 Pages) RENESAS

165 / 424 page

Rev.2.00

Aug 28, 2006

page 44 of 202

7643 Group

REJ09B0133-0200

APPLICATION

2.4 UART

Fig. 2.4.10 Structure of Interrupt control register A

Interrupt control register A

b7 b6 b5 b4 b3 b2 b1 b0

Interrupt control register A

(ICONA : address 0516)

Name

Functions

At reset R W

USB function interrupt

enable bit

INT1 interrupt enable bit

DMAC0 interrupt enable

bit

UART receive buffer full

interrupt enable bit

INT0 interrupt enable bit

0 : Interrupt disabled

1 : Interrupt enabled

0 : Interrupt disabled

1 : Interrupt enabled

0 : Interrupt disabled

1 : Interrupt enabled

0 : Interrupt disabled

1 : Interrupt enabled

0 : Interrupt disabled

1 : Interrupt enabled

0 : Interrupt disabled

1 : Interrupt enabled

0 : Interrupt disabled

1 : Interrupt enabled

DMAC1 interrupt enable

bit

UART transmit interrupt

enable bit

Nothing is arranged for this bit.

Fix this bit to “0”.

Interrupt control register B

b7 b6 b5 b4 b3 b2 b1 b0

Interrupt control register B

(ICONB : address 0616)

Name

Functions

At reset R W

UART summing error

interrupt enable bit

Timer 1 interrupt enable bit

0 : Interrupt disabled

1 : Interrupt enabled

0 : Interrupt disabled

1 : Interrupt enabled

0 : Interrupt disabled

1 : Interrupt enabled

Timer 2 interrupt enable bit

Nothing is arranged for these bits.

Fix these bits to “0”.

Fig. 2.4.11 Structure of Interrupt control register B

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