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UJA1075TW/5V0/WD Datasheet(PDF) 31 Page - NXP Semiconductors |
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UJA1075TW/5V0/WD Datasheet(HTML) 31 Page - NXP Semiconductors |
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31 / 53 page  UJA1075_2 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 02 — 27 May 2010 31 of 53 NXP Semiconductors UJA1075 High-speed CAN/LIN core system basis chip [1] According to JEDEC JESD51-2 and JESD51-3 at natural convection on 1s board. [2] According to JEDEC JESD51-2, JESD51-5 and JESD51-7 at natural convection on 2s2p board. Board with two inner copper layers (thickness: 35 μm) and thermal via array under the exposed pad connected to the first inner copper layer. Fig 14. HTSSOP32 thermal resistance junction to ambient as a function of PCB copper area Table 9. Thermal characteristics Symbol Parameter Conditions Typ Unit Rth(j-a) thermal resistance from junction to ambient single-layer board [1] 78 K/W four-layer board [2] 39 K/W PCB Cu heatsink area (cm2) 0 10 8 46 2 015aaa138 50 70 90 Rth(j-a) (K/W) 30 without heatsink top layer with heatsink top layer |
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