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UJA1075TW/5V0/WD Datasheet(PDF) 45 Page - NXP Semiconductors |
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UJA1075TW/5V0/WD Datasheet(HTML) 45 Page - NXP Semiconductors |
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45 / 53 page ![]() UJA1075_2 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 02 — 27 May 2010 45 of 53 NXP Semiconductors UJA1075 High-speed CAN/LIN core system basis chip 11. Test information 11.1 Quality information This product has been qualified in accordance with the Automotive Electronics Council (AEC) standard Q100 - Failure mechanism based stress test qualification for integrated circuits, and is suitable for use in automotive applications. Fig 19. SPI timing diagram 015aaa045 SCS SCK SDI SDO X X X MSB LSB MSB LSB tv(Q) floating floating th(D) tsu(D) tclk(L) tclk(H) tSPILEAD Tcy(clk) tSPILAG tWH(S) |
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