UJA1075TWSLASH5V0SLASHWD datasheet(41/53 Pages) NXP

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UJA1075_2

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Product data sheet

Rev. 02 — 27 May 2010

41 of 53

NXP Semiconductors

UJA1075

High-speed CAN/LIN core system basis chip

td(TXDCL-RXDCL)

delay time from TXDC LOW

to RXDC LOW

50 % VTXDC to 50 % VRXDC

VV2 = 4.5 V to 5.5 V

R(CANH-CANL) = 60 Ω

C(CANH-CANL) = 100 pF; CRXDC = 15 pF

fTXDC = 250 kHz

235

td(TXDC-busdom)

delay time from TXDC to

bus dominant

VV2 = 4.5 V to 5. 5 V

R(CANH-CANL) = 60 Ω

C(CANH-CANL) = 100 pF

-70

td(TXDC-busrec)

delay time from TXDC to

bus recessive

VV2 = 4.5 V to 5.5 V

R(CANH-CANL) = 60 Ω

C(CANH-CANL) = 100 pF

-90

td(busdom-RXDC)

delay time from bus

dominant to RXDC

VV2 = 4.5 V to 5.5 V

R(CANH-CANL) = 60 Ω

C(CANH-CANL) = 100 pF

CRXDC = 15 pF

-75

td(busrec-RXDC)

delay time from bus

recessive to RXDC

VV2 = 4.5 V to 5.5 V

R(CANH-CANL) = 60 Ω

C(CANH-CANL) = 100 pF

CRXDC = 15 pF

-95

twake(busdom)min

minimum bus dominant

wake-up time

first pulse (after first recessive) for

wake-up on pins CANH and CANL

Sleep mode

0.5

μs

second pulse for wake-up on pins

CANH and CANL

0.5

μs

twake(busrec)min

minimum bus recessive

wake-up time

first pulse for wake-up on pins CANH

and CANL; Sleep mode

0.5

μs

second pulse (after first dominant) for

wake-up on pins CANH and CANL

0.5

μs

tto(wake)

wake-up time-out time

between wake-up and confirm

messages; Sleep mode

0.4

1.2

tto(dom)TXDC

TXDC dominant time-out

time

CAN online; VV2 = 4.5V to 5.5V

VTXDC = 0 V

1.8

4.5

LIN transceiver; pins LIN, TXDL, RXDL

δ1

duty cycle 1

Vth(rec)RX(max) = 0.744VBAT

Vth(dom)RX(max) = 0.581VBAT; tbit = 50 μs

VBAT = 7 V to 18 V; LSC = 0

[1]

[2]

0.396

Vth(rec)RX(max) = 0.76VBAT

Vth(dom)RX(max) = 0.593VBAT; tbit = 50 μs

VBAT = 5.5 V to 7 V; LSC = 0

[1]

[2]

0.396

δ2

duty cycle 2

Vth(rec)RX(min) = 0.422VBAT

Vth(dom)RX(min) = 0.284VBAT; tbit = 50 μs

VBAT = 7.6 V to 18 V; LSC = 0

[2]

[3]

0.581

Vth(rec)RX(min) = 0.41VBAT

Vth(dom)RX(min) = 0.275VBAT; tbit = 50 μs

VBAT = 6.1 V to 7.6 V; LSC = 0

[2]

[3]

0.581

Table 11.

Dynamic characteristics …continued

Tvj = −40 °C to +150 °C; VBAT = 4.5 V to 28 V; VBAT > VV1; VBAT > VV2; RLIN =500 Ω; R(CANH- CANL) = 45 Ω to 65 Ω; all voltages

are defined with respect to ground; positive currents flow in the IC; typical values are given at VBAT = 14 V; unless otherwise

specified.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

UJA1075TW/5V0/WD Datasheet(PDF) 41 Page - NXP Semiconductors

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