UJA1075TWSLASH5V0SLASHWD datasheet(32/53 Pages) NXP

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UJA1075_2

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Product data sheet

Rev. 02 — 27 May 2010

32 of 53

NXP Semiconductors

UJA1075

High-speed CAN/LIN core system basis chip

Static characteristics

Table 10.

Static characteristics

Tvj = −40 °C to +150 °C; VBAT =4.5 V to 28 V; VBAT > VV1; VBAT > VV2; RLIN = 500 Ω; R(CANH-CANL) = 45 Ω to 65 Ω; all voltages

are defined with respect to ground; positive currents flow in the IC; typical values are given at VBAT = 14 V; unless otherwise

specified.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Supply; pin BAT

VBAT

battery supply voltage

4.5

IBAT

battery supply current

MC = 00 (Standby; V1 on, V2 off)

STBCC = STBCL = 1 (CAN/LIN

wake-up enabled)

WIC1 = WIC2 = 11 (WAKE interrupts

enabled); 7.5 V < VBAT <28 V

IV1 =0mA; VRSTN = VSCSN =VV1

VTXDL =VTXDC =VV1; VSDI =VSCK =0V

Tvj = −40 °C

μA

Tvj =25°C

μA

Tvj = 150 °C

μA

MC = 01 (Sleep; V1 off, V2 off)

STBCC = STBCL = 1 (CAN/LIN

wake-up enabled)

WIC1 = WIC2 = 11 (WAKE interrupts

enabled)

7.5 V < VBAT <28V; VV1 =0V

Tvj = −40 °C

μA

Tvj =25°C

μA

Tvj = 150 °C

μA

contributed by LIN wake-up receiver

STBCL = 1

VLIN =VBAT

5.5 V < VBAT <28V

-1.1

μA

contributed by CAN wake-up receiver

STBCC = 1; VCANH =VCANL =2.5 V

5.5 V < VBAT <28V

μA

contributed by WAKEn pin edge

detectors

WIC1 = WIC2 = 11

VWAKE1 =VWAKE2 =VBAT

μA

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