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UJA1075TW/5V0/WD Datasheet(PDF) 1 Page - NXP Semiconductors |
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UJA1075TW/5V0/WD Datasheet(HTML) 1 Page - NXP Semiconductors |
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1 / 53 page  1. General description The UJA1075 core System Basis Chip (SBC) replaces the basic discrete components commonly found in Electronic Control Units (ECU) with a high-speed Controller Area Network (CAN) and a Local Interconnect Network (LIN) interface. The UJA1075 supports the networking applications used to control power and sensor peripherals by using a high-speed CAN as the main network interface and the LIN interface as a local sub-bus. The core SBC contains the following integrated devices: • High-speed CAN transceiver, inter-operable and downward compatible with CAN transceiver TJA1042, and compatible with the ISO 11898-2 and ISO 11898-5 standards • LIN transceiver compliant with LIN 2.1, LIN 2.0 and SAE J2602, and compatible with LIN 1.3 • Advanced independent watchdog (UJA1075/xx/WD versions) • 250 mA voltage regulator for supplying a microcontroller; extendable with external PNP transistor for increased current capability and dissipation distribution • Separate voltage regulator for supplying the on-board CAN transceiver • Serial Peripheral Interface (SPI) (full duplex) • 2 local wake-up input ports • Limp home output port In addition to the advantages gained from integrating these common ECU functions in a single package, the core SBC offers an intelligent combination of system-specific functions such as: • Advanced low-power concept • Safe and controlled system start-up behavior • Detailed status reporting on system and sub-system levels The UJA1075 is designed to be used in combination with a microcontroller that incorporates a CAN controller. The SBC ensures that the microcontroller always starts up in a controlled manner. UJA1075 High-speed CAN/LIN core system basis chip Rev. 02 — 27 May 2010 Product data sheet |
Similar Part No. - UJA1075TW/5V0/WD |
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Similar Description - UJA1075TW/5V0/WD |
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