TMS320C6743CPTP2 datasheet(31/151 Pages) TI1

31 / 151 page

TMS320C6743

www.ti.com

SPRS565D – APRIL 2009 – REVISED JUNE 2014

3.6.11 Timers

Table 3-14. Timers Terminal Functions

PIN NO

SIGNAL NAME

TYPE(1)

PULL(2)

MUXED

DESCRIPTION

PTP

ZKB

TIMER0

UART0_RXD/I2C0_SDA/TM64P0_IN12/GP5[8]/BOOT[8]

IPU

Timer0 lower input

UART0, I2C0,

Timer0 lower

GPIO, BOOT

UART0_TXD/I2C0_SCL/TM64P0_OUT12/GP5[9]/BOOT[9]

IPU

output

TIMER1 (Watchdog )

No external pins. The Timer1 peripheral pins are not pinned out as external pins.

(1)

I = Input, O = Output, I/O = Bidirectional, Z = High impedance, PWR = Supply voltage, GND = Ground, A = Analog signal.

Note: For multiplexed pins where functions have different types (i.e., input versus output), the table reflects the pin function direction for

that particular peripheral.

(2)

IPD = Internal Pulldown resistor, IPU = Internal Pullup resistor

3.6.12 Multichannel Audio Serial Ports (McASP0, McASP1)

Table 3-15. Multichannel Audio Serial Ports (McASPs) Terminal Functions

PIN NO

SIGNAL NAME

TYPE(1)

PULL(2)

MUXED

DESCRIPTION

PTP

ZKB

McASP0

EMA_OE/AXR0[13]/GP2[7]

I/O

IPU

EMIFA, GPIO

EMA_WE/AXR0[12]/GP2[3]/BOOT[14]

M13

I/O

IPU

EMIFA, GPIO, BOOT

AXR0[11]/ GP3[11]

124

I/O

IPD

GPIO

AXR0[10]/GP3[10]

123

I/O

IPD

GPIO

AXR0[9]/GP3[9]

122

I/O

IPD

GPIO

AXR0[8]/MDIO_D/GP3[8]

121

I/O

IPU

MDIO, GPIO

AXR0[7]/MDIO_CLK/GP3[7]

120

I/O

IPD

McASP0 serial data

AXR0[6]/RMII_RXER/GP3[6]

118

I/O

IPD

AXR0[5]/RMII_RXD[1]/GP3[5]

117

I/O

IPD

AXR0[4]/RMII_RXD[0]/GP3[4]

116

I/O

IPD

AXR0[3]/RMII_CRS_DV/GP3[3]

115

I/O

IPD

EMAC, GPIO

AXR0[2]/RMII_TXEN/GP3[2]

113

I/O

IPD

AXR0[1]/RMII_TXD[1]/GP3[1]

112

I/O

IPD

AXR0[0]/RMII_TXD[0]/GP3[0]

111

I/O

IPD

McASP0 transmit

AHCLKX0/GP2[11]

125

I/O

IPD

GPIO

master clock

McASP0 transmit bit

ACLKX0/ECAP0/APWM0/GP2[12]

126

I/O

IPD

eCAP0, GPIO

clock

McASP0 transmit

AFSX0/GP2[13]/BOOT[10]

127

I/O

IPD

GPIO, BOOT

frame sync

McASP0 receive

AHCLKR0/RMII_MHZ_50_CLK/GP2[14]/BOOT[11]

129

I/O

IPD

EMAC, GPIO, BOOT

master clock

McASP0 receive bit

ACLKR0/ECAP1/APWM1/GP2[15]

130

I/O

IPD

eCAP1, GPIO

clock

McASP0 receive frame

AFSR0/GP3[12]

131

I/O

IPD

GPIO

sync

(1)

I = Input, O = Output, I/O = Bidirectional, Z = High impedance, PWR = Supply voltage, GND = Ground, A = Analog signal.

Note: For multiplexed pins where functions have different types (i.e., input versus output), the table reflects the pin function direction for

that particular peripheral.

(2)

IPD = Internal Pulldown resistor, IPU = Internal Pullup resistor

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