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TMS320C6743CPTP2 Datasheet(PDF) 67 Page - Texas Instruments |
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TMS320C6743CPTP2 Datasheet(HTML) 67 Page - Texas Instruments |
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67 / 151 page ![]() TMS320C6743 www.ti.com SPRS565D – APRIL 2009 – REVISED JUNE 2014 Table 6-19. EMIFA Asynchronous Memory Switching Characteristics(1) (2) (3) (continued) NO. PARAMETER MIN NOM MAX UNIT Output hold time, 9 th(EMOEH-EMAIV) (RH)*E-3 (RH)*E (RH)*E+3 ns EMA_OE high to EMA_A[13:0] invalid EMA_OE active low width (EW = 0) (RST)*E-3 (RST)*E (RST)*E+3 ns 10 tw(EMOEL) EMA_OE active low width (EW = 1) (RST+EWC)*E-3 (RST+EWC)*E (RST+EWC)*E+3 ns Delay time from EMA_WAIT deasserted to 11 td(EMWAITH-EMOEH) 3E-3 4E 4E+3 ns EMA_OE high WRITES EMIF write cycle time (EW = 0) (WS+WST+WH)*E-3 (WS+WST+WH)*E (WS+WST+WH)*E+3 ns 15 tc(EMWCYCLE) EMIF write cycle time (EW = 1) (WS+WST+WH+EWC)*E-3 (WS+WST+WH+EWC)*E (WS+WST+WH+EWC)*E+3 ns Output setup time, (WS)*E-3 (WS)*E (WS)*E+3 ns EMA_CE[5:2] low to EMA_WE low (SS = 0) 16 tsu(EMCEL-EMWEL) Output setup time, -3 0 +3 ns EMA_CE[5:2] low to EMA_WE low (SS = 1) Output hold time, (WH)*E-3 (WH)*E (WH)*E+3 ns EMA_WE high to EMA_CE[5:2] high (SS = 0) 17 th(EMWEH-EMCEH) Output hold time, -3 0 +3 ns EMA_WE high to EMA_CE[5:2] high (SS = 1) Output setup time, 18 tsu(EMDQMV-EMWEL) (WS)*E-3 (WS)*E (WS)*E+3 ns EMA_BA[1:0] valid to EMA_WE low Output hold time, 19 th(EMWEH-EMDQMIV) (WH)*E-3 (WH)*E (WH)*E+3 ns EMA_WE high to EMA_BA[1:0] invalid Output setup time, 20 tsu(EMBAV-EMWEL) (WS)*E-3 (WS)*E (WS)*E+3 ns EMA_BA[1:0] valid to EMA_WE low Output hold time, 21 th(EMWEH-EMBAIV) (WH)*E-3 (WH)*E (WH)*E+3 ns EMA_WE high to EMA_BA[1:0] invalid Output setup time, 22 tsu(EMAV-EMWEL) (WS)*E-3 (WS)*E (WS)*E+3 ns EMA_A[13:0] valid to EMA_WE low Output hold time, 23 th(EMWEH-EMAIV) (WH)*E-3 (WH)*E (WH)*E+3 ns EMA_WE high to EMA_A[13:0] invalid EMA_WE active low width (EW = 0) (WST)*E-3 (WST)*E (WST)*E+3 ns 24 tw(EMWEL) EMA_WE active low width (EW = 1) (WST+EWC)*E-3 (WST+EWC)*E (WST+EWC)*E+3 ns Delay time from EMA_WAIT deasserted to 25 td(EMWAITH-EMWEH) 3E-3 4E 4E+3 ns EMA_WE high Output setup time, 26 tsu(EMDV-EMWEL) (WS)*E-3 (WS)*E (WS)*E+3 ns EMA_D[15:0] valid to EMA_WE low Output hold time, 27 th(EMWEH-EMDIV) (WH)*E-3 (WH)*E (WH)*E+3 ns EMA_WE high to EMA_D[15:0] invalid Copyright © 2009–2014, Texas Instruments Incorporated Peripheral Information and Electrical Specifications 67 Submit Documentation Feedback Product Folder Links: TMS320C6743 |
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