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TMS320C6743CPTP2 Datasheet(PDF) 71 Page - Texas Instruments

Part # TMS320C6743CPTP2
Description  Fixed- and Floating-Point Digital Signal Processor
PDF  151 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TMS320C6743CPTP2 Datasheet(HTML) 71 Page - Texas Instruments

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TMS320C6743
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SPRS565D – APRIL 2009 – REVISED JUNE 2014
6.11.2 Interfacing to SDRAM
The EMIFB supports a glueless interface to SDRAM devices with the following characteristics:
•
Pre-charge bit is A[10]
•
Supports 8, 9, 10 or 11 column address bits.
•
Supports up to 13 row address bits is 13.
•
Supports 1, 2 or 4 internal banks.
Table 6-20 shows the supported SDRAM configurations for EMIFB.
Table 6-20. EMIFB Supported SDRAM Configurations(1)
SDRAM
Memory
Memory
Number of
EMIFB Data
Total Memory
Total Memory
Data
Rows
Columns
Banks
Density
Memories
Bus Size
(Mbits)
(Mbytes)
Bus Width
(Mbits)
(bits)
1
16
13
8
1
32
4
32
1
16
13
8
2
64
8
64
1
16
13
8
4
128
16
128
1
16
13
9
1
64
8
64
1
16
13
9
2
128
16
128
1
16
13
9
4
256
32
256
16
1
16
13
10
1
128
16
128
1
16
13
10
2
256
32
256
1
16
13
10
4
512
64
512
1
16
13
11
1
256
32
256
1
16
13
11
2
512
64
512
1
16
13
11
4
1024
128
1024
2
16
13
8
1
32
4
16
2
16
13
8
2
64
8
32
2
16
13
8
4
128
16
64
2
16
13
9
1
64
8
32
2
16
13
9
2
128
16
64
2
16
13
9
4
256
32
128
8
2
16
13
10
1
128
16
64
2
16
13
10
2
256
32
128
2
16
13
10
4
512
64
256
2
16
13
11
1
256
32
128
2
16
13
11
2
512
64
256
2
16
13
11
4
1024
128
512
(1)
The shaded cells indicate configurations that are possible on the EMIFB interface but as of this writing SDRAM memories capable of
supporting these densities are not available in the market.
Figure 6-18 shows an interface between the EMIFB and a 2M × 16 × 4 bank SDRAM device. In addition,
and shows an interface between the EMIFB and two 4M × 16 × 4 bank SDRAM devices. Refer to Table 6-
21, as an example that shows additional list of commonly-supported SDRAM devices and the required
connections for the address pins. Note that in Table 6-21, page size/column size (not indicated in the
table) is varied to get the required addressability range.
Copyright © 2009–2014, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications
71
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