MC68HC908AP16CFB datasheet(313/440 Pages) MOTOROLA

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Serial Peripheral Interface Module (SPI)

I/O Registers

MC68HC908AP Family — Rev. 2.5

Data Sheet

MOTOROLA

313

15.13 I/O Registers

Three registers control and monitor SPI operation:

•

SPI control register (SPCR)

•

SPI status and control register (SPSCR)

•

SPI data register (SPDR)

15.13.1 SPI Control Register

The SPI control register:

•

Enables SPI module interrupt requests

•

Configures the SPI module as master or slave

•

Selects serial clock polarity and phase

•

Configures the SPSCK, MOSI, and MISO pins as open-drain

outputs

•

Enables the SPI module

SPRIE — SPI Receiver Interrupt Enable Bit

This read/write bit enables CPU interrupt requests generated by the

SPRF bit. The SPRF bit is set when a byte transfers from the shift

1 = SPRF CPU interrupt requests enabled

0 = SPRF CPU interrupt requests disabled

Address: $0010

Bit 7

654321

Bit 0

Read:

SPRIE

SPMSTR

CPOL

CPHA

SPWOM

SPE

SPTIE

Write:

Reset:

00101000

= Unimplemented

= Reserved

Figure 15-13. SPI Control Register (SPCR)

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

MC68HC908AP16CFB Datasheet(PDF) 313 Page - Motorola, Inc

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