MC68HC908AP16CFB datasheet(62/440 Pages) MOTOROLA

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FLASH Memory

Data Sheet

MC68HC908AP Family — Rev. 2.5

MOTOROLA

4.7 FLASH Protection

Due to the ability of the on-board charge pump to erase and program the

FLASH memory in the target application, provision is made to protect

pages of memory from unintentional erase or program operations due to

system malfunction. This protection is done by use of a FLASH block

protect register (FLBPR). The FLBPR determines the range of the

FLASH memory which is to be protected. The range of the protected

area starts from a location defined by FLBPR and ends to the bottom of

the FLASH memory ($FFFF). When the memory is protected, the HVEN

bit cannot be set in either erase or program operations.

NOTE:

The mask option register ($FFCF) and the 48 bytes of user interrupt

vectors ($FFD0–$FFFF) are always protected, regardless of the value in

the FLASH block protect register. A mass erase is required to erase

these locations.

4.7.1 FLASH Block Protect Register

The FLASH block protect register is implemented as an 8-bit I/O register.

The value in this register determines the starting address of the

protected range within the FLASH memory.

BPR[7:0] — FLASH Block Protect Bits

BPR[7:1] represent bits [15:9] of a 16-bit memory address. Bits [8:0]

are logic 0’s.

Address:

$FE09

Bit 7

654321

Bit 0

Read:

BPR7

BPR6

BPR5

BPR4

BPR3

BPR2

BPR1

BPR0

Write:

Reset:

00000000

Figure 4-4. FLASH Block Protect Register (FLBPR)

16-bit memory address

Start address of FLASH block protect

000000000

BPR[7:1]

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

MC68HC908AP16CFB Datasheet(PDF) 62 Page - Motorola, Inc

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